262 lines
11 KiB
C
262 lines
11 KiB
C
/**
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******************************************************************************
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* @file s25fl512s.h
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* @author MCD Application Team
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* @version V1.0.0
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* @date 03-August-2015
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* @brief This file contains all the description of the S25FL512S QSPI memory.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __S25FL512S_H
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#define __S25FL512S_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup Components
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* @{
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*/
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/** @addtogroup s25fl512s
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* @brief This file provides a set of definitions for the Spansion
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* S25FL512S memory (configuration, commands, registers).
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* @{
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*/
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/** @defgroup S25FL512S_Exported_Types
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup S25FL512S_Exported_Constants
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* @{
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*/
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/* S25FL512SAGMFI01 Spansion Memory */
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/**
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* @brief S25FL512S Configuration
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*/
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#define S25FL512S_FLASH_SIZE 0x4000000 /* 512 MBits => 64MBytes */
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#define S25FL512S_SECTOR_SIZE 0x40000 /* 256 sectors of 256KBytes */
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#define S25FL512S_PAGE_SIZE 0x200 /* 131072 pages of 512 bytes */
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#define S25FL512S_BULK_ERASE_MAX_TIME 460000
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#define S25FL512S_SECTOR_ERASE_MAX_TIME 2600
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/**
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* @brief S25FL512S Commands
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*/
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/* Reset Operations */
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#define S25FL512S_SOFTWARE_RESET_CMD 0xF0
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#define S25FL512S_MODE_BIT_RESET_CMD 0xFF
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/* Identification Operations */
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#define S25FL512S_READ_ID_CMD 0x90
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#define S25FL512S_READ_ID_CMD2 0x9F
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#define S25FL512S_READ_ELECTRONIC_SIGNATURE 0xAB
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#define S25FL512S_READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A
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/* Register Operations */
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#define S25FL512S_READ_STATUS_REG1_CMD 0x05
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#define S25FL512S_READ_STATUS_REG2_CMD 0x07
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#define S25FL512S_READ_CONFIGURATION_REG1_CMD 0x35
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#define S25FL512S_WRITE_STATUS_CMD_REG_CMD 0x01
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#define S25FL512S_WRITE_DISABLE_CMD 0x04
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#define S25FL512S_WRITE_ENABLE_CMD 0x06
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#define S25FL512S_CLEAR_STATUS_REG1_CMD 0x30
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#define S25FL512S_READ_AUTOBOOT_REG_CMD 0x14
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#define S25FL512S_WRITE_AUTOBOOT_REG_CMD 0x15
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#define S25FL512S_READ_BANK_REG_CMD 0x16
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#define S25FL512S_WRITE_BANK_REG_CMD 0x17
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#define S25FL512S_ACCESS_BANK_REG_CMD 0xB9
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#define S25FL512S_READ_DATA_LEARNING_PATTERN_CMD 0x41
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#define S25FL512S_PGM_NV_DATA_LEARNING_REG_CMD 0x43
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#define S25FL512S_WRITE_VOL_DATA_LEARNING_REG_CMD 0x4A
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/* Read Operations */
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#define S25FL512S_READ_CMD 0x03
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#define S25FL512S_READ_4_BYTE_ADDR_CMD 0x13
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#define S25FL512S_FAST_READ_CMD 0x0B
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#define S25FL512S_FAST_READ_4_BYTE_ADDR_CMD 0x0C
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#define S25FL512S_FAST_READ_DDR_CMD 0x0D
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#define S25FL512S_FAST_READ__DDR_4_BYTE_ADDR_CMD 0x0E
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#define S25FL512S_DUAL_OUT_FAST_READ_CMD 0x3B
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#define S25FL512S_DUAL_OUT_FAST_READ_4_BYTE_ADDR_CMD 0x3C
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#define S25FL512S_QUAD_OUT_FAST_READ_CMD 0x6B
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#define S25FL512S_QUAD_OUT_FAST_READ_4_BYTE_ADDR_CMD 0x6C
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#define S25FL512S_DUAL_INOUT_FAST_READ_CMD 0xBB
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#define S25FL512S_DUAL_INOUT_FAST_READ_DTR_CMD 0xBD
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#define S25FL512S_DUAL_INOUT_FAST_READ_4_BYTE_ADDR_CMD 0xBC
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#define S25FL512S_DDR_DUAL_INOUT_READ_4_BYTE_ADDR_CMD 0xBE
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#define S25FL512S_QUAD_INOUT_FAST_READ_CMD 0xEB
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#define S25FL512S_QUAD_INOUT_FAST_READ_4_BYTE_ADDR_CMD 0xEC
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#define S25FL512S_QUAD_INOUT_FAST_READ_DDR_CMD 0xED
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#define S25FL512S_QUAD_INOUT_READ_DDR_4_BYTE_ADDR_CMD 0xEE
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/* Program Operations */
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#define S25FL512S_PAGE_PROG_CMD 0x02
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#define S25FL512S_PAGE_PROG_4_BYTE_ADDR_CMD 0x12
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#define S25FL512S_QUAD_IN_FAST_PROG_CMD 0x32
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#define S25FL512S_QUAD_IN_FAST_PROG_ALTERNATE_CMD 0x38
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#define S25FL512S_QUAD_IN_FAST_PROG_4_BYTE_ADDR_CMD 0x34
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#define S25FL512S_PROGRAM_SUSPEND_CMD 0x85
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#define S25FL512S_PROGRAM_RESUME_CMD 0x8A
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/* Erase Operations */
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#define S25FL512S_SECTOR_ERASE_CMD 0xD8
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#define S25FL512S_SECTOR_ERASE_4_BYTE_ADDR_CMD 0xDC
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#define S25FL512S_BULK_ERASE_CMD 0x60
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#define S25FL512S_BULK_ERASE_ALTERNATE_CMD 0xC7
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#define S25FL512S_PROG_ERASE_SUSPEND_CMD 0x75
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#define S25FL512S_PROG_ERASE_RESUME_CMD 0x7A
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/* One-Time Programmable Operations */
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#define S25FL512S_PROG_OTP_ARRAY_CMD 0x42
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#define S25FL512S_READ_OTP_ARRAY_CMD 0x4B
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/* Advanced Sector Protection Operations */
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#define S25FL512S_READ_DYB_CMD 0xE0
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#define S25FL512S_WRITE_DYB_CMD 0xE1
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#define S25FL512S_READ_PPB_CMD 0xE2
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#define S25FL512S_PROGRAM_PPB_CMD 0xE3
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#define S25FL512S_ERASE_PPB_CMD 0xE4
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#define S25FL512S_READ_ASP_CMD 0x2B
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#define S25FL512S_PROGRAM_ASP_CMD 0x2F
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#define S25FL512S_READ_PPB_LOCKBIT_CMD 0xA7
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#define S25FL512S_WRITE_PPB_LOCKBIT_CMD 0xA6
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#define S25FL512S_READ_PASSWORD_CMD 0xE7
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#define S25FL512S_PROGRAM_PASSWORD_CMD 0xE8
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#define S25FL512S_UNLOCK_PASSWORD_CMD 0xE9
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/**
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* @brief S25FL512S Registers
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*/
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/* Status Register-1 */
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#define S25FL512S_SR1_WIP ((uint8_t)0x01) /*!< Write in progress, device busy */
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#define S25FL512S_SR1_WREN ((uint8_t)0x02) /*!< Write Registers, program or commands are accepted */
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#define S25FL512S_SR1_BP0 ((uint8_t)0x04) /*!< Sector0 protected from Program or Erase */
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#define S25FL512S_SR1_BP1 ((uint8_t)0x08) /*!< Sector1 protected from Program or Erase */
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#define S25FL512S_SR1_BP2 ((uint8_t)0x10) /*!< Sector2 protected from Program or Erase */
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#define S25FL512S_SR1_ERERR ((uint8_t)0x20) /*!< Erase error */
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#define S25FL512S_SR1_PGERR ((uint8_t)0x40) /*!< Program error */
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#define S25FL512S_SR1_SRWD ((uint8_t)0x80) /*!< Status Register Write Disable */
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/* Status Register-2 */
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#define S25FL512S_SR2_PS ((uint8_t)0x01) /*!< Program in Suspend mode */
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#define S25FL512S_SR2_ES ((uint8_t)0x02) /*!< Erase Suspend Mode */
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/* Configuration Register CR1 */
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#define S25FL512S_CR1_FREEZE ((uint8_t)0x01) /*!< Block protection and OTP locked */
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#define S25FL512S_CR1_QUAD ((uint8_t)0x02) /*!< Quad mode enable */
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#define S25FL512S_CR1_BPNV ((uint8_t)0x08) /*!< BP2-0 bits of Status Reg are volatile */
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#define S25FL512S_CR1_TBPROT ((uint8_t)0x20) /*!< BPstarts at bottom */
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#define S25FL512S_CR1_LC_MASK ((uint8_t)0xC0) /*!< Latency Code mask */
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#define S25FL512S_CR1_LC0 ((uint8_t)0x00) /*!< Latency Code = 0 */
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#define S25FL512S_CR1_LC1 ((uint8_t)0x40) /*!< Latency Code = 1 */
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#define S25FL512S_CR1_LC2 ((uint8_t)0x80) /*!< Latency Code = 2 */
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#define S25FL512S_CR1_LC3 ((uint8_t)0xC0) /*!< Latency Code = 3 */
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/* AutoBoot Register */
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#define S25FL512S_AB_EN ((uint32_t)0x00000001) /*!< AutoBoot Enabled */
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#define S25FL512S_AB_SD_MASK ((uint32_t)0x000001FE) /*!< AutoBoot Start Delay mask */
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#define S25FL512S_AB_SA_MASK ((uint32_t)0xFFFFFE00) /*!< AutoBoot Start Address mask */
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/* Bank Address Register */
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#define S25FL512S_BA_BA24 ((uint8_t)0x01) /*!< A24 for 512 Mb device */
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#define S25FL512S_BA_BA25 ((uint8_t)0x02) /*!< A25 for 512 Mb device */
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#define S25FL512S_BA_EXTADD ((uint8_t)0x80) /*!< 4 bytes addressing required from command */
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/* ASP Register */
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#define S25FL512S_ASP_PSTMLB ((uint16_t)0x0002) /*!< Persistent protection mode not permanently enabled */
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#define S25FL512S_ASP_PWSMLB ((uint16_t)0x0003) /*!< Password protection mode not permanently enabled */
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/* PPB Lock Register */
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#define S25FL512S_PPBLOCK ((uint8_t)0x01) /*!< PPB array may be programmed or erased */
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/**
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* @}
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*/
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/** @defgroup S25FL512S_Exported_Functions
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* @{
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __S25FL512S_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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