From 42ad37a956aa636fed64414c474199b3670ab1f6 Mon Sep 17 00:00:00 2001 From: Niels Moseley Date: Thu, 26 Oct 2017 17:57:09 +0200 Subject: [PATCH] Updated DAC lowpass filter in documentation --- boards/Digilent DE0/README.md | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/boards/Digilent DE0/README.md b/boards/Digilent DE0/README.md index 52c6360..6a01064 100644 --- a/boards/Digilent DE0/README.md +++ b/boards/Digilent DE0/README.md @@ -2,17 +2,17 @@ * Altera EP3C16F484C6 FPGA -The DAC output is the UART_TX pin. It _really_ needs a 5kHz lowpass filter, otherwise you'll be deafened/greeted by a very loud 10kHz PWM carrier. Try a 330 ohm series resistor, followed by a 100nF capacitor to ground: +The DAC output is the UART_TX pin. It _really_ needs a 5kHz lowpass filter, otherwise you'll be deafened/greeted by a very loud 10kHz PWM carrier. Try two sections of a 1K ohm series resistor, followed by a 100nF capacitor to ground: ``` -UART_TX pin ----RRRRR---------o OUTPUT - | - C - C - C - | - GND +UART_TX pin ----RRRRR--------RRRRR---------o OUTPUT + | | + C C + C C + C C + | | + GND GND ``` \ No newline at end of file