jackcartersmith/Speech256 - Speech256 - JCS - Gitea

jackcartersmith/Speech256

mirror of https://github.com/trcwm/Speech256.git synced 2025-06-07 16:48:32 +02:00

Go to file

Niels Moseley 22b3443358 Fixed python script to generate sign-magnitude coeffs instead of 2s complement ones. Filter engine FSM needs revisiting.

2017-10-24 00:34:54 +02:00

Updated readme.

2017-10-09 23:16:08 +02:00

Removed superfluous comments. Added 2x/double_mode for A1 coefficients to filter engine.

2017-10-21 00:38:12 +02:00

Fixed python script to generate sign-magnitude coeffs instead of 2s complement ones. Filter engine FSM needs revisiting.

2017-10-24 00:34:54 +02:00

README.md

.

2017-10-09 23:29:27 +02:00

README.md

An FPGA implementation of a classic 80ies speech synthesizer in Verilog.

Introduction

Platform agnostic implementation.

FPGA requirements

? K ROM

License

TBD.

This project was done during the Retro Challenge 2017/10 contest.