jackcartersmith/Speech256
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README.md

Speech256

An FPGA implementation of a classic 80ies speech synthesizer in Verilog.

Introduction

  • Platform agnostic implementation.

FPGA requirements

  • ? K ROM

License

TBD.

This project was done during the Retro Challenge 2017/10 contest.
Retrochallenge

Description
No description provided
Readme 224 KiB
Languages
Verilog 97.5%
Python 1.1%
MATLAB 0.8%
Batchfile 0.6%