diff --git a/lib/stm32/f4/rcc.c b/lib/stm32/f4/rcc.c
index 2f716da7..a9441e85 100644
--- a/lib/stm32/f4/rcc.c
+++ b/lib/stm32/f4/rcc.c
@@ -61,6 +61,7 @@ const struct rcc_clock_scale rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.power_save = 1,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_3WS,
+		.ahb_frequency  = 48000000,
 		.apb1_frequency = 12000000,
 		.apb2_frequency = 24000000,
 	},
@@ -74,6 +75,7 @@ const struct rcc_clock_scale rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.ppre2 = RCC_CFGR_PPRE_DIV_NONE,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_2WS,
+		.ahb_frequency  = 84000000,
 		.apb1_frequency = 42000000,
 		.apb2_frequency = 84000000,
 	},
@@ -88,6 +90,7 @@ const struct rcc_clock_scale rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.power_save = 1,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_3WS,
+		.ahb_frequency  = 120000000,
 		.apb1_frequency = 30000000,
 		.apb2_frequency = 60000000,
 	},
@@ -101,6 +104,7 @@ const struct rcc_clock_scale rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.ppre2 = RCC_CFGR_PPRE_DIV_2,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_5WS,
+		.ahb_frequency  = 168000000,
 		.apb1_frequency = 42000000,
 		.apb2_frequency = 84000000,
 	},
@@ -118,6 +122,7 @@ const struct rcc_clock_scale rcc_hse_12mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.power_save = 1,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_3WS,
+		.ahb_frequency  = 48000000,
 		.apb1_frequency = 12000000,
 		.apb2_frequency = 24000000,
 	},
@@ -131,6 +136,7 @@ const struct rcc_clock_scale rcc_hse_12mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.ppre2 = RCC_CFGR_PPRE_DIV_NONE,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_2WS,
+		.ahb_frequency  = 84000000,
 		.apb1_frequency = 42000000,
 		.apb2_frequency = 84000000,
 	},
@@ -145,6 +151,7 @@ const struct rcc_clock_scale rcc_hse_12mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.power_save = 1,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_3WS,
+		.ahb_frequency  = 120000000,
 		.apb1_frequency = 30000000,
 		.apb2_frequency = 60000000,
 	},
@@ -158,6 +165,7 @@ const struct rcc_clock_scale rcc_hse_12mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.ppre2 = RCC_CFGR_PPRE_DIV_2,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_5WS,
+		.ahb_frequency  = 168000000,
 		.apb1_frequency = 42000000,
 		.apb2_frequency = 84000000,
 	},
@@ -175,6 +183,7 @@ const struct rcc_clock_scale rcc_hse_16mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.power_save = 1,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_3WS,
+		.ahb_frequency  = 48000000,
 		.apb1_frequency = 12000000,
 		.apb2_frequency = 24000000,
 	},
@@ -188,6 +197,7 @@ const struct rcc_clock_scale rcc_hse_16mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.ppre2 = RCC_CFGR_PPRE_DIV_NONE,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_2WS,
+		.ahb_frequency  = 84000000,
 		.apb1_frequency = 42000000,
 		.apb2_frequency = 84000000,
 	},
@@ -202,6 +212,7 @@ const struct rcc_clock_scale rcc_hse_16mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.power_save = 1,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_3WS,
+		.ahb_frequency  = 120000000,
 		.apb1_frequency = 30000000,
 		.apb2_frequency = 60000000,
 	},
@@ -215,6 +226,7 @@ const struct rcc_clock_scale rcc_hse_16mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.ppre2 = RCC_CFGR_PPRE_DIV_2,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_5WS,
+		.ahb_frequency  = 168000000,
 		.apb1_frequency = 42000000,
 		.apb2_frequency = 84000000,
 	},
@@ -232,6 +244,7 @@ const struct rcc_clock_scale rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.power_save = 1,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_3WS,
+		.ahb_frequency  = 48000000,
 		.apb1_frequency = 12000000,
 		.apb2_frequency = 24000000,
 	},
@@ -245,6 +258,7 @@ const struct rcc_clock_scale rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.ppre2 = RCC_CFGR_PPRE_DIV_NONE,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_2WS,
+		.ahb_frequency  = 84000000,
 		.apb1_frequency = 42000000,
 		.apb2_frequency = 84000000,
 	},
@@ -259,6 +273,7 @@ const struct rcc_clock_scale rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.power_save = 1,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_3WS,
+		.ahb_frequency  = 120000000,
 		.apb1_frequency = 30000000,
 		.apb2_frequency = 60000000,
 	},
@@ -272,6 +287,7 @@ const struct rcc_clock_scale rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_END] = {
 		.ppre2 = RCC_CFGR_PPRE_DIV_2,
 		.flash_config = FLASH_ACR_ICE | FLASH_ACR_DCE |
 				FLASH_ACR_LATENCY_5WS,
+		.ahb_frequency  = 168000000,
 		.apb1_frequency = 42000000,
 		.apb2_frequency = 84000000,
 	},
@@ -622,6 +638,7 @@ void rcc_clock_setup_hse_3v3(const struct rcc_clock_scale *clock)
 	rcc_wait_for_sysclk_status(RCC_PLL);
 
 	/* Set the peripheral clock frequencies used. */
+	rcc_ahb_frequency  = clock->ahb_frequency;
 	rcc_apb1_frequency = clock->apb1_frequency;
 	rcc_apb2_frequency = clock->apb2_frequency;