Add RCC_CSR bit definitions and a osc_t enum.
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@ -57,9 +57,9 @@
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/* --- RCC_CFGR values ----------------------------------------------------- */
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/* --- RCC_CFGR values ----------------------------------------------------- */
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/* SW: System clock switch */
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/* SW: System clock switch */
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#define SW_SYSCLKSEL_HSICLK 0x0
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#define SW_SYSCLKSEL_HSICLK 0x0
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#define SW_SYSCLKSEL_HSECLK 0x1
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#define SW_SYSCLKSEL_HSECLK 0x1
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#define SW_SYSCLKSEL_PLLCLK 0x2
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#define SW_SYSCLKSEL_PLLCLK 0x2
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/* SWS: System clock switch status: Uses same bit definitions as SW. */
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/* SWS: System clock switch status: Uses same bit definitions as SW. */
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@ -118,7 +118,7 @@
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#define PLLMUL_PLLCLK_MUL14 0xc
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#define PLLMUL_PLLCLK_MUL14 0xc
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#define PLLMUL_PLLCLK_MUL15 0xd
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#define PLLMUL_PLLCLK_MUL15 0xd
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#define PLLMUL_PLLCLK_MUL16 0xe
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#define PLLMUL_PLLCLK_MUL16 0xe
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// #define PLLMUL_PLLCLK_MUL16 0xf /* Errata? 17? */
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// #define PLLMUL_PLLCLK_MUL16 0xf /* Errata? 17? */
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/* USBPRE: USB prescaler */
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/* USBPRE: USB prescaler */
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#define USBPRE_PLLCLK_DIV1_5 0x0
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#define USBPRE_PLLCLK_DIV1_5 0x0
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@ -223,4 +223,20 @@
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#define RTCEN (1 << 15)
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#define RTCEN (1 << 15)
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#define BDRST (1 << 16)
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#define BDRST (1 << 16)
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/* --- RCC_CSR values -------------------------------------------------- */
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#define LSION (1 << 0)
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#define LSIRDY (1 << 1)
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#define RMVF (1 << 24)
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#define PINRSTF (1 << 26)
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#define PORRSTF (1 << 27)
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#define SFTRSTF (1 << 28)
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#define IWDGRSTF (1 << 29)
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#define WWDGRSTF (1 << 30)
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#define LPWRRSTF (1 << 31)
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typedef enum {
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PLL, HSE, HSI, LSE, LSI
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} osc_t;
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#endif
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#endif
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