made blinking a led on efm32 possible
this includes all register definitions for the gpu and mcu modules, but not all their bit definitions
This commit is contained in:
chrysn
parent
2180a02e2f
commit
08918902ab
@ -18,55 +18,28 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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//#include <libopencm3/efm32/tinygecko/gpio.h>
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//
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//void gpio_setup(void)
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//{
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// /* Enable GPIOC clock. */
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// /* Manually: */
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// // RCC_APB2ENR |= RCC_APB2ENR_IOPCEN;
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// /* Using API functions: */
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// rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN);
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//
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// /* Set GPIO8 (in GPIO port C) to 'output push-pull'. */
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// /* Manually: */
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// // GPIOC_CRH = (GPIO_CNF_OUTPUT_PUSHPULL << (((8 - 8) * 4) + 2));
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// // GPIOC_CRH |= (GPIO_MODE_OUTPUT_2_MHZ << ((8 - 8) * 4));
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// /* Using API functions: */
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// gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ,
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// GPIO_CNF_OUTPUT_PUSHPULL, GPIO8);
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//}
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#include <libopencm3/efm32/tinygecko/gpio.h>
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#include <libopencm3/efm32/tinygecko/cmu.h>
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int main(void)
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{
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// int i;
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//
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// gpio_setup();
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//
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// /* Blink the LED (PC8) on the board. */
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// while (1) {
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// /* Manually: */
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// // GPIOC_BSRR = GPIO8; /* LED off */
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// // for (i = 0; i < 800000; i++) /* Wait a bit. */
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// // __asm__("nop");
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// // GPIOC_BRR = GPIO8; /* LED on */
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// // for (i = 0; i < 800000; i++) /* Wait a bit. */
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// // __asm__("nop");
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//
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// /* Using API functions gpio_set()/gpio_clear(): */
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// // gpio_set(GPIOC, GPIO8); /* LED off */
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// // for (i = 0; i < 800000; i++) /* Wait a bit. */
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// // __asm__("nop");
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// // gpio_clear(GPIOC, GPIO8); /* LED on */
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// // for (i = 0; i < 800000; i++) /* Wait a bit. */
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// // __asm__("nop");
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//
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// /* Using API function gpio_toggle(): */
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// gpio_toggle(GPIOC, GPIO8); /* LED on/off */
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// for (i = 0; i < 800000; i++) /* Wait a bit. */
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// __asm__("nop");
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// }
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//
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// return 0;
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for(;;);
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// FIXME: As of now, this doesn't work without x being volatile; an issue with linking?
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volatile int x;
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// Before GPIO works, according to d0034_efm32tg_reference_manual.pdf
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// note in section 28.3.7, we'll have to enable GPIO in CMU_HFPERCLKEN0
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CMU_HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
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// The User LED is connected to PD7 to the plus side of the LED
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// according to t0011_efm32_tiny_gecko_stk_user_manual.pdf figures 16.2
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// and 16.3 (called UIF_LED0)
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GPIO_PD_MODEL = GPIO_MODE_PUSHPULL<<(7*4);
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GPIO_PD_DOUTSET = 1<<7;
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while(1) {
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for(x = 0; x < 200000; ++x);
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GPIO_PD_DOUTTGL = 1<<7;
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};
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}
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66
include/libopencm3/efm32/tinygecko/cmu.h
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66
include/libopencm3/efm32/tinygecko/cmu.h
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@ -0,0 +1,66 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2012 chrysn <chrysn@fsfe.org>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* this interface correspons to the description in
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* d0034_efm32tg_reference_manual.pdf section 11. */
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#ifndef LIBOPENCM3_EFM32_TINYGECKO_CMU_H
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#define LIBOPENCM3_EFM32_TINYGECKO_CMU_H
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#include <libopencm3/cm3/common.h>
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#define CMU_BASE 0x400C8000 /* according to d0034_efm32tg_reference_manual.pdf figure 5.2 */
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/* this is d0034_efm32tg_reference_manual.pdf section 11.4 */
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#define CMU_CTRL MMIO32(CMU_BASE + 0x000)
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#define CMU_HFCORECLKDIV MMIO32(CMU_BASE + 0x004)
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#define CMU_HFPERCLKDIV MMIO32(CMU_BASE + 0x008)
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#define CMU_HFRCOCTRL MMIO32(CMU_BASE + 0x00C)
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#define CMU_LFRCOCTRL MMIO32(CMU_BASE + 0x010)
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#define CMU_AUXHFRCOCTRL MMIO32(CMU_BASE + 0x014)
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#define CMU_CALCTRL MMIO32(CMU_BASE + 0x018)
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#define CMU_CALCNT MMIO32(CMU_BASE + 0x01C)
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#define CMU_OSCENCMD MMIO32(CMU_BASE + 0x020)
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#define CMU_CMD MMIO32(CMU_BASE + 0x024)
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#define CMU_LFCLKSEL MMIO32(CMU_BASE + 0x028)
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#define CMU_STATUS MMIO32(CMU_BASE + 0x02C)
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#define CMU_IF MMIO32(CMU_BASE + 0x030)
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#define CMU_IFS MMIO32(CMU_BASE + 0x034)
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#define CMU_IFC MMIO32(CMU_BASE + 0x038)
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#define CMU_IEN MMIO32(CMU_BASE + 0x03C)
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#define CMU_HFCORECLKEN0 MMIO32(CMU_BASE + 0x040)
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#define CMU_HFPERCLKEN0 MMIO32(CMU_BASE + 0x044)
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#define CMU_SYNCBUSY MMIO32(CMU_BASE + 0x050)
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#define CMU_FREEZE MMIO32(CMU_BASE + 0x054)
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#define CMU_LFACLKEN0 MMIO32(CMU_BASE + 0x058)
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#define CMU_LFBCLKEN0 MMIO32(CMU_BASE + 0x060)
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#define CMU_LFAPRESC0 MMIO32(CMU_BASE + 0x068)
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#define CMU_LFBPRESC0 MMIO32(CMU_BASE + 0x070)
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#define CMU_PCNTCTRL MMIO32(CMU_BASE + 0x078)
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#define CMU_LCDCTRL MMIO32(CMU_BASE + 0x07C)
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#define CMU_ROUTE MMIO32(CMU_BASE + 0x080)
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#define CMU_LOCK MMIO32(CMU_BASE + 0x084)
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/* this is incomplete because i'm impatient and want a working result
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* quickly */
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#define CMU_HFPERCLKEN0_GPIO (1<<6)
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#endif
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152
include/libopencm3/efm32/tinygecko/gpio.h
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152
include/libopencm3/efm32/tinygecko/gpio.h
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@ -0,0 +1,152 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2012 chrysn <chrysn@fsfe.org>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* this interface corresponds to the description in
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* d0034_efm32tg_reference_manual.pdf section 28. the interface tries to be
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* close to stm32/f1's gpio interface. */
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#ifndef LIBOPENCM3_EFM32_TINYGECKO_GPIO_H
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#define LIBOPENCM3_EFM32_TINYGECKO_GPIO_H
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#include <libopencm3/cm3/common.h>
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#define GPIO_BASE 0x40006000 /* according to d0034_efm32tg_reference_manual.pdf figure 5.2 */
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/* this is rather straight forward d0034_efm32tg_reference_manual.pdf section 28.4 */
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#define GPIO_Px_CTRL_OFFSET 0x000
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#define GPIO_Px_MODEL_OFFSET 0x004
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#define GPIO_Px_MODEH_OFFSET 0x008
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#define GPIO_Px_DOUT_OFFSET 0x00C
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#define GPIO_Px_DOUTSET_OFFSET 0x010
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#define GPIO_Px_DOUTCLR_OFFSET 0x014
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#define GPIO_Px_DOUTTGL_OFFSET 0x018
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#define GPIO_Px_DIN_OFFSET 0x01C
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#define GPIO_Px_PINLOCKN_OFFSET 0x020
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#define GPIO_PA (GPIO_BASE + 0x000)
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#define GPIO_PA_CTRL MMIO32(GPIO_PA + GPIO_Px_CTRL_OFFSET)
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#define GPIO_PA_MODEL MMIO32(GPIO_PA + GPIO_Px_MODEL_OFFSET)
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#define GPIO_PA_MODEH MMIO32(GPIO_PA + GPIO_Px_MODEH_OFFSET)
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#define GPIO_PA_DOUT MMIO32(GPIO_PA + GPIO_Px_DOUT_OFFSET)
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#define GPIO_PA_DOUTSET MMIO32(GPIO_PA + GPIO_Px_DOUTSET_OFFSET)
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#define GPIO_PA_DOUTCLR MMIO32(GPIO_PA + GPIO_Px_DOUTCLR_OFFSET)
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#define GPIO_PA_DOUTTGL MMIO32(GPIO_PA + GPIO_Px_DOUTTGL_OFFSET)
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#define GPIO_PA_DIN MMIO32(GPIO_PA + GPIO_Px_DIN_OFFSET)
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#define GPIO_PA_PINLOCKN MMIO32(GPIO_PA + GPIO_Px_PINLOCKN_OFFSET)
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#define GPIO_PB (GPIO_BASE + 0x024)
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#define GPIO_PB_CTRL MMIO32(GPIO_PB + GPIO_Px_CTRL_OFFSET)
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#define GPIO_PB_MODEL MMIO32(GPIO_PB + GPIO_Px_MODEL_OFFSET)
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#define GPIO_PB_MODEH MMIO32(GPIO_PB + GPIO_Px_MODEH_OFFSET)
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#define GPIO_PB_DOUT MMIO32(GPIO_PB + GPIO_Px_DOUT_OFFSET)
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#define GPIO_PB_DOUTSET MMIO32(GPIO_PB + GPIO_Px_DOUTSET_OFFSET)
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#define GPIO_PB_DOUTCLR MMIO32(GPIO_PB + GPIO_Px_DOUTCLR_OFFSET)
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#define GPIO_PB_DOUTTGL MMIO32(GPIO_PB + GPIO_Px_DOUTTGL_OFFSET)
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#define GPIO_PB_DIN MMIO32(GPIO_PB + GPIO_Px_DIN_OFFSET)
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#define GPIO_PB_PINLOCKN MMIO32(GPIO_PB + GPIO_Px_PINLOCKN_OFFSET)
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#define GPIO_PC (GPIO_BASE + 0x048)
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#define GPIO_PC_CTRL MMIO32(GPIO_PC + GPIO_Px_CTRL_OFFSET)
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#define GPIO_PC_MODEL MMIO32(GPIO_PC + GPIO_Px_MODEL_OFFSET)
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#define GPIO_PC_MODEH MMIO32(GPIO_PC + GPIO_Px_MODEH_OFFSET)
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#define GPIO_PC_DOUT MMIO32(GPIO_PC + GPIO_Px_DOUT_OFFSET)
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#define GPIO_PC_DOUTSET MMIO32(GPIO_PC + GPIO_Px_DOUTSET_OFFSET)
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#define GPIO_PC_DOUTCLR MMIO32(GPIO_PC + GPIO_Px_DOUTCLR_OFFSET)
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#define GPIO_PC_DOUTTGL MMIO32(GPIO_PC + GPIO_Px_DOUTTGL_OFFSET)
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#define GPIO_PC_DIN MMIO32(GPIO_PC + GPIO_Px_DIN_OFFSET)
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#define GPIO_PC_PINLOCKN MMIO32(GPIO_PC + GPIO_Px_PINLOCKN_OFFSET)
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#define GPIO_PD (GPIO_BASE + 0x06C)
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#define GPIO_PD_CTRL MMIO32(GPIO_PD + GPIO_Px_CTRL_OFFSET)
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#define GPIO_PD_MODEL MMIO32(GPIO_PD + GPIO_Px_MODEL_OFFSET)
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#define GPIO_PD_MODEH MMIO32(GPIO_PD + GPIO_Px_MODEH_OFFSET)
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#define GPIO_PD_DOUT MMIO32(GPIO_PD + GPIO_Px_DOUT_OFFSET)
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#define GPIO_PD_DOUTSET MMIO32(GPIO_PD + GPIO_Px_DOUTSET_OFFSET)
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#define GPIO_PD_DOUTCLR MMIO32(GPIO_PD + GPIO_Px_DOUTCLR_OFFSET)
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#define GPIO_PD_DOUTTGL MMIO32(GPIO_PD + GPIO_Px_DOUTTGL_OFFSET)
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#define GPIO_PD_DIN MMIO32(GPIO_PD + GPIO_Px_DIN_OFFSET)
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#define GPIO_PD_PINLOCKN MMIO32(GPIO_PD + GPIO_Px_PINLOCKN_OFFSET)
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#define GPIO_PE (GPIO_BASE + 0x090)
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#define GPIO_PE_CTRL MMIO32(GPIO_PE + GPIO_Px_CTRL_OFFSET)
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#define GPIO_PE_MODEL MMIO32(GPIO_PE + GPIO_Px_MODEL_OFFSET)
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#define GPIO_PE_MODEH MMIO32(GPIO_PE + GPIO_Px_MODEH_OFFSET)
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#define GPIO_PE_DOUT MMIO32(GPIO_PE + GPIO_Px_DOUT_OFFSET)
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#define GPIO_PE_DOUTSET MMIO32(GPIO_PE + GPIO_Px_DOUTSET_OFFSET)
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#define GPIO_PE_DOUTCLR MMIO32(GPIO_PE + GPIO_Px_DOUTCLR_OFFSET)
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#define GPIO_PE_DOUTTGL MMIO32(GPIO_PE + GPIO_Px_DOUTTGL_OFFSET)
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#define GPIO_PE_DIN MMIO32(GPIO_PE + GPIO_Px_DIN_OFFSET)
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#define GPIO_PE_PINLOCKN MMIO32(GPIO_PE + GPIO_Px_PINLOCKN_OFFSET)
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#define GPIO_PF (GPIO_BASE + 0x0B4)
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#define GPIO_PF_CTRL MMIO32(GPIO_PF + GPIO_Px_CTRL_OFFSET)
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#define GPIO_PF_MODEL MMIO32(GPIO_PF + GPIO_Px_MODEL_OFFSET)
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#define GPIO_PF_MODEH MMIO32(GPIO_PF + GPIO_Px_MODEH_OFFSET)
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#define GPIO_PF_DOUT MMIO32(GPIO_PF + GPIO_Px_DOUT_OFFSET)
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#define GPIO_PF_DOUTSET MMIO32(GPIO_PF + GPIO_Px_DOUTSET_OFFSET)
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#define GPIO_PF_DOUTCLR MMIO32(GPIO_PF + GPIO_Px_DOUTCLR_OFFSET)
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#define GPIO_PF_DOUTTGL MMIO32(GPIO_PF + GPIO_Px_DOUTTGL_OFFSET)
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#define GPIO_PF_DIN MMIO32(GPIO_PF + GPIO_Px_DIN_OFFSET)
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#define GPIO_PF_PINLOCKN MMIO32(GPIO_PF + GPIO_Px_PINLOCKN_OFFSET)
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#define GPIO_EXTIPSELL MMIO32(GPIO_BASE + 0x100)
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#define GPIO_EXTIPSELH MMIO32(GPIO_BASE + 0x104)
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#define GPIO_EXTIRISE MMIO32(GPIO_BASE + 0x108)
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#define GPIO_EXTIFALL MMIO32(GPIO_BASE + 0x10C)
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#define GPIO_IEN MMIO32(GPIO_BASE + 0x110)
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#define GPIO_IF MMIO32(GPIO_BASE + 0x114)
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#define GPIO_IFS MMIO32(GPIO_BASE + 0x118)
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#define GPIO_IFC MMIO32(GPIO_BASE + 0x11C)
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#define GPIO_ROUTE MMIO32(GPIO_BASE + 0x120)
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#define GPIO_INSENSE MMIO32(GPIO_BASE + 0x124)
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#define GPIO_LOCK MMIO32(GPIO_BASE + 0x128)
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#define GPIO_CTRL MMIO32(GPIO_BASE + 0x12C)
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#define GPIO_CMD MMIO32(GPIO_BASE + 0x130)
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#define GPIO_EM4WUEN MMIO32(GPIO_BASE + 0x134)
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#define GPIO_EM4WUPOL MMIO32(GPIO_BASE + 0x138)
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#define GPIO_EM4WUCAUSE MMIO32(GPIO_BASE + 0x13C)
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/* these are the modes defined for the MODEx fields in the MODEL/MODEH
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* registers, named as in d0034_efm32tg_reference_manual.pdf's sections
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* 28.5.2/28.5.3. for explanations of what they really do, rather see section
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* 28.3.1. */
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#define GPIO_MODE_DISABLED 0
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#define GPIO_MODE_INPUT 1
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#define GPIO_MODE_INPUTPULL 2
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#define GPIO_MODE_INPUTPULLFILTER 3
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#define GPIO_MODE_PUSHPULL 4
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#define GPIO_MODE_PUSHPULLDRIVE 5
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#define GPIO_MODE_WIREDOR 6
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#define GPIO_MODE_WIREDORPULLDOWN 7
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#define GPIO_MODE_WIREDAND 8
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#define GPIO_MODE_WIREDANDFILTER 9
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#define GPIO_MODE_WIREDANDPULLUP 10
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#define GPIO_MODE_WIREDANDPULLUPFILTER 11
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#define GPIO_MODE_WIREDANDDRIVE 12
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#define GPIO_MODE_WIREDANDDRIVEFILTER 13
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#define GPIO_MODE_WIREDANDDRIVEPULLUP 14
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#define GPIO_MODE_WIREDANDDRIVEPULLUPFILTER 15
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//void gpio_set(u32 gpioport, u16 gpios);
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//void gpio_clear(u32 gpioport, u16 gpios);
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//void gpio_toggle(u32 gpioport, u16 gpios);
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//u16 gpio_get(u32 gpioport, u16 gpios);
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#endif
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