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stm32/f4/adc: DMA can always be used with ADC2

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I can't find any evidence in the manual to support this comment's claim.
This commit is contained in:
Ben Gamari 2012-11-13 17:20:05 -05:00
parent a43f1d0844
commit 08a14a9d9e
1 changed files with 2 additions and 8 deletions
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10
lib/stm32/f4/adc.c
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@ -435,17 +435,12 @@ void adc_set_right_aligned(u32 adc)
/*-----------------------------------------------------------------------------*/ /*-----------------------------------------------------------------------------*/
/** @brief ADC Enable DMA Transfers /** @brief ADC Enable DMA Transfers
Only available for ADC1 through DMA1 channel1, and ADC3 through DMA2 channel5.
ADC2 will use DMA if it is set as slave in dual mode with ADC1 in DMA transfer
mode.
@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base @param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
*/ */
void adc_enable_dma(u32 adc) void adc_enable_dma(u32 adc)
{ {
if ((adc == ADC1) | (adc == ADC3)) ADC_CR2(adc) |= ADC_CR2_DMA;
ADC_CR2(adc) |= ADC_CR2_DMA;
} }
/*-----------------------------------------------------------------------------*/ /*-----------------------------------------------------------------------------*/
@ -456,8 +451,7 @@ void adc_enable_dma(u32 adc)
void adc_disable_dma(u32 adc) void adc_disable_dma(u32 adc)
{ {
if ((adc == ADC1) | (adc == ADC3)) ADC_CR2(adc) &= ~ADC_CR2_DMA;
ADC_CR2(adc) &= ~ADC_CR2_DMA;
} }
/*-----------------------------------------------------------------------------*/ /*-----------------------------------------------------------------------------*/