From 789ae97212a272a13a9eea40683429a4c4fb71e2 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Fri, 2 Mar 2012 15:29:23 -0800 Subject: [PATCH 01/29] Some additional LGPL3+ license change cleanups. Changed the license to LGPL3+ for some makefiles that got ommited in the previous big patch commit. Corrected a find and replace error in a linker file. --- examples/stm32/f2/jobygps/jobygps.ld | 6 +++--- lib/lm3s/Makefile | 12 ++++++------ lib/lpc13xx/Makefile | 12 ++++++------ lib/stm32/f1/Makefile | 12 ++++++------ lib/stm32/f2/Makefile | 12 ++++++------ lib/stm32/f4/Makefile | 12 ++++++------ 6 files changed, 33 insertions(+), 33 deletions(-) diff --git a/examples/stm32/f2/jobygps/jobygps.ld b/examples/stm32/f2/jobygps/jobygps.ld index d8271ff1..73caf0ea 100644 --- a/examples/stm32/f2/jobygps/jobygps.ld +++ b/examples/stm32/f2/jobygps/jobygps.ld @@ -4,16 +4,16 @@ * Copyright (C) 2009 Uwe Hermann * * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser Lesser General Public License as published by + * it under the terms of the GNU Lesser General Public License as published by * the Free Software Foundation, either version 3 of the License, or * (at your option) any later version. * * This library is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser Lesser General Public License for more details. + * GNU Lesser General Public License for more details. * - * You should have received a copy of the GNU Lesser Lesser General Public License + * You should have received a copy of the GNU Lesser General Public License * along with this library. If not, see . */ diff --git a/lib/lm3s/Makefile b/lib/lm3s/Makefile index 93a67ad9..7ebc3651 100644 --- a/lib/lm3s/Makefile +++ b/lib/lm3s/Makefile @@ -3,18 +3,18 @@ ## ## Copyright (C) 2009 Uwe Hermann ## -## This program is free software: you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by ## the Free Software Foundation, either version 3 of the License, or ## (at your option) any later version. ## -## This program is distributed in the hope that it will be useful, +## This library is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. +## GNU Lesser General Public License for more details. ## -## You should have received a copy of the GNU General Public License -## along with this program. If not, see . +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . ## LIBNAME = libopencm3_lm3s diff --git a/lib/lpc13xx/Makefile b/lib/lpc13xx/Makefile index 04e33c87..e4f2096a 100644 --- a/lib/lpc13xx/Makefile +++ b/lib/lpc13xx/Makefile @@ -3,18 +3,18 @@ ## ## Copyright (C) 2009 Uwe Hermann ## -## This program is free software: you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by ## the Free Software Foundation, either version 3 of the License, or ## (at your option) any later version. ## -## This program is distributed in the hope that it will be useful, +## This library is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. +## GNU Lesser General Public License for more details. ## -## You should have received a copy of the GNU General Public License -## along with this program. If not, see . +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . ## LIBNAME = libopencm3_lpc13xx diff --git a/lib/stm32/f1/Makefile b/lib/stm32/f1/Makefile index 5025dfaf..d598f847 100644 --- a/lib/stm32/f1/Makefile +++ b/lib/stm32/f1/Makefile @@ -3,18 +3,18 @@ ## ## Copyright (C) 2009 Uwe Hermann ## -## This program is free software: you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by ## the Free Software Foundation, either version 3 of the License, or ## (at your option) any later version. ## -## This program is distributed in the hope that it will be useful, +## This library is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. +## GNU Lesser General Public License for more details. ## -## You should have received a copy of the GNU General Public License -## along with this program. If not, see . +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . ## LIBNAME = libopencm3_stm32f1 diff --git a/lib/stm32/f2/Makefile b/lib/stm32/f2/Makefile index 17c8ad0a..e0f8d95a 100644 --- a/lib/stm32/f2/Makefile +++ b/lib/stm32/f2/Makefile @@ -3,18 +3,18 @@ ## ## Copyright (C) 2009 Uwe Hermann ## -## This program is free software: you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by ## the Free Software Foundation, either version 3 of the License, or ## (at your option) any later version. ## -## This program is distributed in the hope that it will be useful, +## This library is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. +## GNU Lesser General Public License for more details. ## -## You should have received a copy of the GNU General Public License -## along with this program. If not, see . +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . ## LIBNAME = libopencm3_stm32f2 diff --git a/lib/stm32/f4/Makefile b/lib/stm32/f4/Makefile index b27ef8ed..f8b4dd28 100644 --- a/lib/stm32/f4/Makefile +++ b/lib/stm32/f4/Makefile @@ -3,18 +3,18 @@ ## ## Copyright (C) 2009 Uwe Hermann ## -## This program is free software: you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by ## the Free Software Foundation, either version 3 of the License, or ## (at your option) any later version. ## -## This program is distributed in the hope that it will be useful, +## This library is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. +## GNU Lesser General Public License for more details. ## -## You should have received a copy of the GNU General Public License -## along with this program. If not, see . +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . ## LIBNAME = libopencm3_stm32f4 From 7907b29113b9308d81dafd35c2804a21bf713242 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Sat, 3 Mar 2012 00:46:07 +0100 Subject: [PATCH 02/29] Fix search-replace left-over. --- examples/stm32/f1/stm32-h103/usb_iap/usbiap.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c b/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c index 3cf7044e..c5cc8ba0 100644 --- a/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c +++ b/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c @@ -149,7 +149,7 @@ static void usbdfu_getstatus_complete(struct usb_setup_data *req) u32 baseaddr = prog.addr + ((prog.blocknum - 2) * dfu_function.wTransferSize); for (i = 0; i < prog.len; i += 2) - flash_library_half_word(baseaddr + i, + flash_program_half_word(baseaddr + i, *(u16 *)(prog.buf + i)); } flash_lock(); From 7e9425bdacc5169600c09b7f17c27dbea36ec402 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Sun, 11 Mar 2012 23:12:26 -0700 Subject: [PATCH 03/29] Added usart example to lisa/m 2.0 --- examples/stm32/f1/lisa-m-2/usart/Makefile | 25 +++++++ examples/stm32/f1/lisa-m-2/usart/README | 12 ++++ examples/stm32/f1/lisa-m-2/usart/usart.c | 86 +++++++++++++++++++++++ 3 files changed, 123 insertions(+) create mode 100644 examples/stm32/f1/lisa-m-2/usart/Makefile create mode 100644 examples/stm32/f1/lisa-m-2/usart/README create mode 100644 examples/stm32/f1/lisa-m-2/usart/usart.c diff --git a/examples/stm32/f1/lisa-m-2/usart/Makefile b/examples/stm32/f1/lisa-m-2/usart/Makefile new file mode 100644 index 00000000..4ba7e9e5 --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/usart/Makefile @@ -0,0 +1,25 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +BINARY = usart + +LDSCRIPT = ../lisa-m.ld + +include ../../Makefile.include + diff --git a/examples/stm32/f1/lisa-m-2/usart/README b/examples/stm32/f1/lisa-m-2/usart/README new file mode 100644 index 00000000..5a3f3168 --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/usart/README @@ -0,0 +1,12 @@ +------------------------------------------------------------------------------ +README +------------------------------------------------------------------------------ + +This example program sends some characters on USART2 on Lisa/M 2.0 board +(see http://paparazzi.enac.fr/wiki/LisaM for details). + +The terminal settings for the receiving device/PC are 38400 8n1. + +The sending is done in a blocking way in the code, see the usart_irq example +for a more elaborate USART example. + diff --git a/examples/stm32/f1/lisa-m-2/usart/usart.c b/examples/stm32/f1/lisa-m-2/usart/usart.c new file mode 100644 index 00000000..4422b55e --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/usart/usart.c @@ -0,0 +1,86 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include +#include +#include + +void clock_setup(void) +{ + rcc_clock_setup_in_hse_12mhz_out_72mhz(); + + /* Enable GPIOA, GPIOB, GPIOC clock. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, + RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | + RCC_APB2ENR_IOPCEN); + + /* Enable clocks for GPIO port B (for GPIO_USART3_TX) and USART3. */ + rcc_peripheral_enable_clock(&RCC_APB1ENR, + RCC_APB1ENR_USART2EN); +} + +void usart_setup(void) +{ + /* Setup GPIO pin GPIO_USART2_TX. */ + gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART2_TX); + + /* Setup UART parameters. */ + usart_set_baudrate(USART2, 38400); + usart_set_databits(USART2, 8); + usart_set_stopbits(USART2, USART_STOPBITS_1); + usart_set_mode(USART2, USART_MODE_TX); + usart_set_parity(USART2, USART_PARITY_NONE); + usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE); + + /* Finally enable the USART. */ + usart_enable(USART2); + +} + +void gpio_setup(void) +{ + /* Set GPIO8 (in GPIO port A) to 'output push-pull'. */ + gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO8); +} + +int main(void) +{ + int i, j = 0, c = 0; + + clock_setup(); + gpio_setup(); + usart_setup(); + + /* Blink the LED (PA8) on the board with every transmitted byte. */ + while (1) { + gpio_toggle(GPIOA, GPIO8); /* LED on/off */ + usart_send_blocking(USART2, c + '0'); /* USART2: Send byte. */ + c = (c == 9) ? 0 : c + 1; /* Increment c. */ + if ((j++ % 80) == 0) { /* Newline after line full. */ + usart_send_blocking(USART2, '\r'); + usart_send_blocking(USART2, '\n'); + } + for (i = 0; i < 800000; i++) /* Wait a bit. */ + __asm__("nop"); + } + + return 0; +} From 22706613d900d8cc309834c1f2fa8b345b8b4494 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Sun, 11 Mar 2012 23:26:28 -0700 Subject: [PATCH 04/29] Added usart irq example for lisa/m 2.0 --- examples/stm32/f1/lisa-m-2/usart_irq/Makefile | 25 ++++ .../stm32/f1/lisa-m-2/usart_irq/usart_irq.c | 126 ++++++++++++++++++ 2 files changed, 151 insertions(+) create mode 100644 examples/stm32/f1/lisa-m-2/usart_irq/Makefile create mode 100644 examples/stm32/f1/lisa-m-2/usart_irq/usart_irq.c diff --git a/examples/stm32/f1/lisa-m-2/usart_irq/Makefile b/examples/stm32/f1/lisa-m-2/usart_irq/Makefile new file mode 100644 index 00000000..7baa2fed --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/usart_irq/Makefile @@ -0,0 +1,25 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +BINARY = usart_irq + +LDSCRIPT = ../lisa-m.ld + +include ../../Makefile.include + diff --git a/examples/stm32/f1/lisa-m-2/usart_irq/usart_irq.c b/examples/stm32/f1/lisa-m-2/usart_irq/usart_irq.c new file mode 100644 index 00000000..dbe9140a --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/usart_irq/usart_irq.c @@ -0,0 +1,126 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include +#include +#include +#include + +void clock_setup(void) +{ + rcc_clock_setup_in_hse_12mhz_out_72mhz(); + + /* Enable GPIOA clock (for LED GPIOs). */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPCEN); + + /* Enable clocks for GPIO port A (for GPIO_USART2_TX) and USART2. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN | + RCC_APB2ENR_AFIOEN); + + rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN); +} + +void usart_setup(void) +{ + /* Enable the USART2 interrupt. */ + nvic_enable_irq(NVIC_USART2_IRQ); + + /* Setup GPIO pin GPIO_USART2_TX on GPIO port A for transmit. */ + gpio_set_mode(GPIO_BANK_USART2_TX, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART2_TX); + + /* Setup GPIO pin GPIO_USART2_RX on GPIO port A for receive. */ + gpio_set_mode(GPIO_BANK_USART2_RX, GPIO_MODE_INPUT, + GPIO_CNF_INPUT_FLOAT, GPIO_USART2_RX); + + /* Setup UART parameters. */ + usart_set_baudrate(USART2, 230400); + usart_set_databits(USART2, 8); + usart_set_stopbits(USART2, USART_STOPBITS_1); + usart_set_parity(USART2, USART_PARITY_NONE); + usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE); + usart_set_mode(USART2, USART_MODE_TX_RX); + + /* Enable USART2 Receive interrupt. */ + USART_CR1(USART2) |= USART_CR1_RXNEIE; + + /* Finally enable the USART. */ + usart_enable(USART2); +} + +void gpio_setup(void) +{ + gpio_set(GPIOA, GPIO8); + + /* Setup GPIO8 (in GPIO port A) for LED use. */ + gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO8); + + gpio_set(GPIOC, GPIO15); + + /* Setup GPIO15 (in GPIO port C) for LED use. */ + gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO15); +} + +void usart2_isr(void) +{ + static u8 data = 'A'; + + /* Check if we were called because of RXNE. */ + if (((USART_CR1(USART2) & USART_CR1_RXNEIE) != 0) && + ((USART_SR(USART2) & USART_SR_RXNE) != 0)) { + + /* Indicate that we got data. */ + gpio_toggle(GPIOA, GPIO8); + + /* Retrieve the data from the peripheral. */ + data = usart_recv(USART2); + + /* Enable transmit interrupt so it sends back the data. */ + USART_CR1(USART2) |= USART_CR1_TXEIE; + } + + /* Check if we were called because of TXE. */ + if (((USART_CR1(USART2) & USART_CR1_TXEIE) != 0) && + ((USART_SR(USART2) & USART_SR_TXE) != 0)) { + + /* Indicate that we are sending out data. */ + gpio_toggle(GPIOC, GPIO15); + + /* Put data into the transmit register. */ + usart_send(USART2, data); + + /* Disable the TXE interrupt as we don't need it anymore. */ + USART_CR1(USART2) &= ~USART_CR1_TXEIE; + } +} + +int main(void) +{ + clock_setup(); + gpio_setup(); + usart_setup(); + + /* Wait forever and do nothing. */ + while (1) + __asm__("nop"); + + return 0; +} From b41987dc7ad99f56d05c694cfd2f69f1e63c3649 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Sun, 11 Mar 2012 23:55:24 -0700 Subject: [PATCH 05/29] Added blocking usart printf for lisa/m 2.0 --- .../stm32/f1/lisa-m-2/usart_printf/Makefile | 25 +++++ .../f1/lisa-m-2/usart_printf/usart_printf.c | 106 ++++++++++++++++++ 2 files changed, 131 insertions(+) create mode 100644 examples/stm32/f1/lisa-m-2/usart_printf/Makefile create mode 100644 examples/stm32/f1/lisa-m-2/usart_printf/usart_printf.c diff --git a/examples/stm32/f1/lisa-m-2/usart_printf/Makefile b/examples/stm32/f1/lisa-m-2/usart_printf/Makefile new file mode 100644 index 00000000..80ac0330 --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/usart_printf/Makefile @@ -0,0 +1,25 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +BINARY = usart_printf + +LDSCRIPT = ../lisa-m.ld + +include ../../Makefile.include + diff --git a/examples/stm32/f1/lisa-m-2/usart_printf/usart_printf.c b/examples/stm32/f1/lisa-m-2/usart_printf/usart_printf.c new file mode 100644 index 00000000..a66bcbc6 --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/usart_printf/usart_printf.c @@ -0,0 +1,106 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann , + * Copyright (C) 2011-2012 Piotr Esden-Tempski + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include +#include +#include +#include +#include +#include + +void clock_setup(void) +{ + rcc_clock_setup_in_hse_12mhz_out_72mhz(); + + /* Enable GPIOA clock (for LED GPIOs). */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN); + + /* Enable clocks for GPIO port A (for GPIO_USART2_TX) and USART2. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN | + RCC_APB2ENR_AFIOEN); + rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN); +} + +void usart_setup(void) +{ + /* Setup GPIO pin GPIO_USART2_RE_TX on GPIO port B for transmit. */ + gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART2_TX); + + /* Setup UART parameters. */ + usart_set_baudrate(USART2, 230400); + usart_set_databits(USART2, 8); + usart_set_stopbits(USART2, USART_STOPBITS_1); + usart_set_parity(USART2, USART_PARITY_NONE); + usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE); + usart_set_mode(USART2, USART_MODE_TX); + + /* Finally enable the USART. */ + usart_enable(USART2); +} + +void gpio_setup(void) +{ + gpio_set(GPIOA, GPIO8); + + /* Setup GPIO8 (in GPIO port A) for LED use. */ + gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO8); +} + +int _write(int file, char *ptr, int len) +{ + int i; + + if (file == 1) { + for (i = 0; i < len; i++) + usart_send_blocking(USART2, ptr[i]); + return i; + } + + errno = EIO; + return -1; +} + +int main(void) +{ + int counter = 0; + float fcounter = 0.0; + double dcounter = 0.0; + + clock_setup(); + gpio_setup(); + usart_setup(); + + /* + * Write Hello World, an integer, float and double all over + * again while incrementing the numbers. + */ + while (1) { + gpio_toggle(GPIOA, GPIO8); + printf("Hello World! %i %f %f\r\n", counter, fcounter, + dcounter); + counter++; + fcounter += 0.01; + dcounter += 0.01; + } + + return 0; +} From 1b7cd12f20d3dd632565b3386b9d42a62aed592b Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Mon, 12 Mar 2012 00:01:48 -0700 Subject: [PATCH 06/29] Added irq usart example for lisa/m 2.0 --- .../f1/lisa-m-2/usart_irq_printf/Makefile | 25 ++ .../usart_irq_printf/usart_irq_printf.c | 269 ++++++++++++++++++ 2 files changed, 294 insertions(+) create mode 100644 examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile create mode 100644 examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c diff --git a/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile b/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile new file mode 100644 index 00000000..0b6fd3eb --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile @@ -0,0 +1,25 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +BINARY = usart_irq_printf + +LDSCRIPT = ../lisa-m.ld + +include ../../Makefile.include + diff --git a/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c b/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c new file mode 100644 index 00000000..6b1096ed --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c @@ -0,0 +1,269 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann , + * Copyright (C) 2011 Piotr Esden-Tempski + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include +#include +#include +#include +#include +#include +#include + +/****************************************************************************** + * Simple ringbuffer implementation from open-bldc's libgovernor that + * you can find at: + * https://github.com/open-bldc/open-bldc/tree/master/source/libgovernor + *****************************************************************************/ + +typedef s32 ring_size_t; + +struct ring { + u8 *data; + ring_size_t size; + u32 begin; + u32 end; +}; + +#define RING_SIZE(RING) ((RING)->size - 1) +#define RING_DATA(RING) (RING)->data +#define RING_EMPTY(RING) ((RING)->begin == (RING)->end) + +void ring_init(struct ring *ring, u8 *buf, ring_size_t size) +{ + ring->data = buf; + ring->size = size; + ring->begin = 0; + ring->end = 0; +} + +s32 ring_write_ch(struct ring *ring, u8 ch) +{ + if (((ring->end + 1) % ring->size) != ring->begin) { + ring->data[ring->end++] = ch; + ring->end %= ring->size; + return (u32)ch; + } + + return -1; +} + +s32 ring_write(struct ring *ring, u8 *data, ring_size_t size) +{ + s32 i; + + for (i = 0; i < size; i++) { + if (ring_write_ch(ring, data[i]) < 0) + return -i; + } + + return i; +} + +s32 ring_read_ch(struct ring *ring, u8 *ch) +{ + s32 ret = -1; + + if (ring->begin != ring->end) { + ret = ring->data[ring->begin++]; + ring->begin %= ring->size; + if (ch) + *ch = ret; + } + + return ret; +} + +s32 ring_read(struct ring *ring, u8 *data, ring_size_t size) +{ + s32 i; + + for (i = 0; i < size; i++) { + if (ring_read_ch(ring, data + i) < 0) + return i; + } + + return -i; +} + +/****************************************************************************** + * The example implementation + *****************************************************************************/ + +#define BUFFER_SIZE 1024 + +struct ring output_ring; +u8 output_ring_buffer[BUFFER_SIZE]; + +void clock_setup(void) +{ + rcc_clock_setup_in_hse_12mhz_out_72mhz(); + + /* Enable GPIOA clock (for LED GPIOs). */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); + + /* Enable clocks for GPIO port A (for GPIO_USART2_TX) and USART2. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN | + RCC_APB2ENR_AFIOEN); + rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN); +} + +void usart_setup(void) +{ + /* Initialize output ring buffer. */ + ring_init(&output_ring, output_ring_buffer, BUFFER_SIZE); + + /* Enable the USART2 interrupt. */ + nvic_enable_irq(NVIC_USART2_IRQ); + + /* Setup GPIO pin GPIO_USART2_TX on GPIO port A for transmit. */ + gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART2_TX); + + /* Setup GPIO pin GPIO_USART2_RX on GPIO port A for receive. */ + gpio_set_mode(GPIOA, GPIO_MODE_INPUT, + GPIO_CNF_INPUT_FLOAT, GPIO_USART2_RX); + + /* Setup UART parameters. */ + usart_set_baudrate(USART2, 230400); + usart_set_databits(USART2, 8); + usart_set_stopbits(USART2, USART_STOPBITS_1); + usart_set_parity(USART2, USART_PARITY_NONE); + usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE); + usart_set_mode(USART2, USART_MODE_TX_RX); + + /* Enable USART2 Receive interrupt. */ + USART_CR1(USART2) |= USART_CR1_RXNEIE; + + /* Finally enable the USART. */ + usart_enable(USART2); +} + +void gpio_setup(void) +{ + gpio_set(GPIOA, GPIO8); + + /* Setup GPIO8 (in GPIO port A) for LED use. */ + gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO8); +} + +void usart2_isr(void) +{ + /* Check if we were called because of RXNE. */ + if (((USART_CR1(USART2) & USART_CR1_RXNEIE) != 0) && + ((USART_SR(USART2) & USART_SR_RXNE) != 0)) { + + /* Indicate that we got data. */ + gpio_toggle(GPIOA, GPIO8); + + /* Retrieve the data from the peripheral. */ + ring_write_ch(&output_ring, usart_recv(USART2)); + + /* Enable transmit interrupt so it sends back the data. */ + USART_CR1(USART2) |= USART_CR1_TXEIE; + } + + /* Check if we were called because of TXE. */ + if (((USART_CR1(USART2) & USART_CR1_TXEIE) != 0) && + ((USART_SR(USART2) & USART_SR_TXE) != 0)) { + + s32 data; + + data = ring_read_ch(&output_ring, NULL); + + if (data == -1) { + /* Disable the TXE interrupt, it's no longer needed. */ + USART_CR1(USART2) &= ~USART_CR1_TXEIE; + } else { + /* Put data into the transmit register. */ + usart_send(USART2, data); + } + } +} + +int _write(int file, char *ptr, int len) +{ + int ret; + + if (file == 1) { + ret = ring_write(&output_ring, (u8 *)ptr, len); + + if (ret < 0) + ret = -ret; + + USART_CR1(USART2) |= USART_CR1_TXEIE; + + return ret; + } + + errno = EIO; + return -1; +} + +void systick_setup(void) +{ + /* 72MHz / 8 => 9000000 counts per second. */ + systick_set_clocksource(STK_CTRL_CLKSOURCE_AHB_DIV8); + + /* 9000000/9000 = 1000 overflows per second - every 1ms one interrupt */ + systick_set_reload(9000); + + systick_interrupt_enable(); + + /* Start counting. */ + systick_counter_enable(); +} + +void sys_tick_handler(void) +{ + static int counter = 0; + static float fcounter = 0.0; + static double dcounter = 0.0; + static u32 temp32 = 0; + + temp32++; + + /* + * We call this handler every 1ms so we are sending hello world + * every 10ms / 100Hz. + */ + if (temp32 == 10) { + printf("Hello World! %i %f %f\r\n", counter, fcounter, + dcounter); + counter++; + fcounter += 0.01; + dcounter += 0.01; + + temp32 = 0; + } +} + +int main(void) +{ + clock_setup(); + gpio_setup(); + usart_setup(); + systick_setup(); + + while (1) + __asm__("nop"); + + return 0; +} From aaa0158221294d0fa953118127529725c10e0b3d Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Tue, 13 Mar 2012 12:18:28 -0700 Subject: [PATCH 07/29] Fixed operation order for dma bit calculations. --- include/libopencm3/stm32/f1/dma.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/include/libopencm3/stm32/f1/dma.h b/include/libopencm3/stm32/f1/dma.h index 2a3d29c5..897e0c5a 100644 --- a/include/libopencm3/stm32/f1/dma.h +++ b/include/libopencm3/stm32/f1/dma.h @@ -127,7 +127,7 @@ /* TEIF: Transfer error interrupt flag */ #define DMA_ISR_TEIF_BIT (1 << 3) -#define DMA_ISR_TEIF(channel) (DMA_ISR_TEIF_BIT << (4 * (channel) -1)) +#define DMA_ISR_TEIF(channel) (DMA_ISR_TEIF_BIT << (4 * ((channel) -1))) #define DMA_ISR_TEIF1 DMA_ISR_TEIF(DMA_CHANNEL1) #define DMA_ISR_TEIF2 DMA_ISR_TEIF(DMA_CHANNEL2) @@ -139,7 +139,7 @@ /* HTIF: Half transfer interrupt flag */ #define DMA_ISR_HTIF_BIT (1 << 2) -#define DMA_ISR_HTIF(channel) (DMA_ISR_HTIF_BIT << (4 * (channel) -1)) +#define DMA_ISR_HTIF(channel) (DMA_ISR_HTIF_BIT << (4 * ((channel) -1))) #define DMA_ISR_HTIF1 DMA_ISR_HTIF(DMA_CHANNEL1) #define DMA_ISR_HTIF2 DMA_ISR_HTIF(DMA_CHANNEL2) @@ -151,7 +151,7 @@ /* TCIF: Transfer complete interrupt flag */ #define DMA_ISR_TCIF_BIT (1 << 1) -#define DMA_ISR_TCIF(channel) (DMA_ISR_TCIF_BIT << (4 * (channel) -1)) +#define DMA_ISR_TCIF(channel) (DMA_ISR_TCIF_BIT << (4 * ((channel) -1))) #define DMA_ISR_TCIF1 DMA_ISR_TCIF(DMA_CHANNEL1) #define DMA_ISR_TCIF2 DMA_ISR_TCIF(DMA_CHANNEL2) @@ -163,7 +163,7 @@ /* GIF: Global interrupt flag */ #define DMA_ISR_GIF_BIT (1 << 0) -#define DMA_ISR_GIF(channel) (DMA_ISR_GIF_BIT << (4 * (channel) -1)) +#define DMA_ISR_GIF(channel) (DMA_ISR_GIF_BIT << (4 * ((channel) -1))) #define DMA_ISR_GIF1 DMA_ISR_GIF(DMA_CHANNEL1) #define DMA_ISR_GIF2 DMA_ISR_GIF(DMA_CHANNEL2) @@ -177,7 +177,7 @@ /* CTEIF: Transfer error clear */ #define DMA_IFCR_CTEIF_BIT (1 << 3) -#define DMA_IFCR_CTEIF(channel) (DMA_IFCR_CTEIF_BIT << (4 * (channel) -1)) +#define DMA_IFCR_CTEIF(channel) (DMA_IFCR_CTEIF_BIT << (4 * ((channel) -1))) #define DMA_IFCR_CTEIF1 DMA_IFCR_CTEIF(DMA_CHANNEL1) #define DMA_IFCR_CTEIF2 DMA_IFCR_CTEIF(DMA_CHANNEL2) @@ -189,7 +189,7 @@ /* CHTIF: Half transfer clear */ #define DMA_IFCR_CHTIF_BIT (1 << 2) -#define DMA_IFCR_CHTIF(channel) (DMA_IFCR_CHTIF_BIT << (4 * (channel) -1)) +#define DMA_IFCR_CHTIF(channel) (DMA_IFCR_CHTIF_BIT << (4 * ((channel) -1))) #define DMA_IFCR_CHTIF1 DMA_IFCR_CHTIF(DMA_CHANNEL1) #define DMA_IFCR_CHTIF2 DMA_IFCR_CHTIF(DMA_CHANNEL2) @@ -201,7 +201,7 @@ /* CTCIF: Transfer complete clear */ #define DMA_IFCR_CTCIF_BIT (1 << 1) -#define DMA_IFCR_CTCIF(channel) (DMA_IFCR_CTCIF_BIT << (4 * (channel) -1)) +#define DMA_IFCR_CTCIF(channel) (DMA_IFCR_CTCIF_BIT << (4 * ((channel) -1))) #define DMA_IFCR_CTCIF1 DMA_IFCR_CTCIF(DMA_CHANNEL1) #define DMA_IFCR_CTCIF2 DMA_IFCR_CTCIF(DMA_CHANNEL2) @@ -213,7 +213,7 @@ /* CGIF: Global interrupt clear */ #define DMA_IFCR_CGIF_BIT (1 << 0) -#define DMA_IFCR_CGIF(channel) (DMA_IFCR_CGIF_BIT << (4 * (channel) -1)) +#define DMA_IFCR_CGIF(channel) (DMA_IFCR_CGIF_BIT << (4 * ((channel) -1))) #define DMA_IFCR_CGIF1 DMA_IFCR_CGIF(DMA_CHANNEL1) #define DMA_IFCR_CGIF2 DMA_IFCR_CGIF(DMA_CHANNEL2) From b7875d0230f81df45145737f8cf46596f8bf15c6 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Wed, 14 Mar 2012 13:15:14 -0700 Subject: [PATCH 08/29] Added dma based usart IO example. --- examples/stm32/f1/lisa-m-2/usart_dma/Makefile | 25 +++ .../stm32/f1/lisa-m-2/usart_dma/usart_dma.c | 199 ++++++++++++++++++ 2 files changed, 224 insertions(+) create mode 100644 examples/stm32/f1/lisa-m-2/usart_dma/Makefile create mode 100644 examples/stm32/f1/lisa-m-2/usart_dma/usart_dma.c diff --git a/examples/stm32/f1/lisa-m-2/usart_dma/Makefile b/examples/stm32/f1/lisa-m-2/usart_dma/Makefile new file mode 100644 index 00000000..813cda90 --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/usart_dma/Makefile @@ -0,0 +1,25 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +BINARY = usart_dma + +LDSCRIPT = ../lisa-m.ld + +include ../../Makefile.include + diff --git a/examples/stm32/f1/lisa-m-2/usart_dma/usart_dma.c b/examples/stm32/f1/lisa-m-2/usart_dma/usart_dma.c new file mode 100644 index 00000000..ac3bb3ca --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/usart_dma/usart_dma.c @@ -0,0 +1,199 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include +#include +#include +#include +#include + +void clock_setup(void) +{ + rcc_clock_setup_in_hse_12mhz_out_72mhz(); + + /* Enable GPIOA, GPIOB, GPIOC clock. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, + RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | + RCC_APB2ENR_IOPCEN); + + /* Enable clocks for GPIO port B (for GPIO_USART3_TX) and USART3. */ + rcc_peripheral_enable_clock(&RCC_APB1ENR, + RCC_APB1ENR_USART2EN); + + /* Enable DMA1 clock */ + rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_DMA1EN); +} + +void usart_setup(void) +{ + /* Setup GPIO pin GPIO_USART2_TX and GPIO_USART2_RX. */ + gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART2_TX); + gpio_set_mode(GPIOA, GPIO_MODE_INPUT, + GPIO_CNF_INPUT_FLOAT, GPIO_USART2_RX); + + /* Setup UART parameters. */ + usart_set_baudrate(USART2, 38400); + usart_set_databits(USART2, 8); + usart_set_stopbits(USART2, USART_STOPBITS_1); + usart_set_mode(USART2, USART_MODE_TX_RX); + usart_set_parity(USART2, USART_PARITY_NONE); + usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE); + + /* Finally enable the USART. */ + usart_enable(USART2); + + nvic_set_priority(NVIC_DMA1_CHANNEL7_IRQ, 0); + nvic_enable_irq(NVIC_DMA1_CHANNEL7_IRQ); + + nvic_set_priority(NVIC_DMA1_CHANNEL6_IRQ, 0); + nvic_enable_irq(NVIC_DMA1_CHANNEL6_IRQ); + +} + +void dma_write(char *data, int size) +{ + /* + * Using channel 7 for USART2_TX + */ + + /* Reset DMA channel*/ + dma_channel_reset(DMA1, DMA_CHANNEL7); + + dma_set_peripheral_address(DMA1, DMA_CHANNEL7, (u32)&USART2_DR); + dma_set_memory_address(DMA1, DMA_CHANNEL7, (u32)data); + dma_set_number_of_data(DMA1, DMA_CHANNEL7, size); + dma_set_read_from_memory(DMA1, DMA_CHANNEL7); + dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL7); + dma_set_peripheral_size(DMA1, DMA_CHANNEL7, DMA_CCR_PSIZE_8BIT); + dma_set_memory_size(DMA1, DMA_CHANNEL7, DMA_CCR_MSIZE_8BIT); + dma_set_priority(DMA1, DMA_CHANNEL7, DMA_CCR_PL_VERY_HIGH); + + dma_enable_transfer_complete_interrupt(DMA1, DMA_CHANNEL7); + + dma_enable_channel(DMA1, DMA_CHANNEL7); + + usart_enable_tx_dma(USART2); +} + +volatile int transfered = 0; + +void dma1_channel7_isr(void) +{ + if ((DMA1_ISR &DMA_ISR_TCIF7) != 0) { + DMA1_IFCR |= DMA_IFCR_CTCIF7; + + transfered = 1; + } + + dma_disable_transfer_complete_interrupt(DMA1, DMA_CHANNEL7); + + usart_disable_tx_dma(USART2); + + dma_disable_channel(DMA1, DMA_CHANNEL7); +} + +void dma_read(char *data, int size) +{ + /* + * Using channel 6 for USART2_RX + */ + + /* Reset DMA channel*/ + dma_channel_reset(DMA1, DMA_CHANNEL6); + + dma_set_peripheral_address(DMA1, DMA_CHANNEL6, (u32)&USART2_DR); + dma_set_memory_address(DMA1, DMA_CHANNEL6, (u32)data); + dma_set_number_of_data(DMA1, DMA_CHANNEL6, size); + dma_set_read_from_peripheral(DMA1, DMA_CHANNEL6); + dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL6); + dma_set_peripheral_size(DMA1, DMA_CHANNEL6, DMA_CCR_PSIZE_8BIT); + dma_set_memory_size(DMA1, DMA_CHANNEL6, DMA_CCR_MSIZE_8BIT); + dma_set_priority(DMA1, DMA_CHANNEL6, DMA_CCR_PL_HIGH); + + dma_enable_transfer_complete_interrupt(DMA1, DMA_CHANNEL6); + + dma_enable_channel(DMA1, DMA_CHANNEL6); + + usart_enable_rx_dma(USART2); +} + +volatile int received = 0; + +void dma1_channel6_isr(void) +{ + if ((DMA1_ISR &DMA_ISR_TCIF6) != 0) { + DMA1_IFCR |= DMA_IFCR_CTCIF6; + + received = 1; + } + + dma_disable_transfer_complete_interrupt(DMA1, DMA_CHANNEL6); + + usart_disable_rx_dma(USART2); + + dma_disable_channel(DMA1, DMA_CHANNEL6); +} + +void gpio_setup(void) +{ + /* Set GPIO8 (in GPIO port A) to 'output push-pull'. */ + gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO8); +} + +int main(void) +{ + char tx[10] = "abcdefg\r\n"; + int tx_len = 10; + char rx[7] = "bcdefg"; + int rx_len = 6; + + clock_setup(); + gpio_setup(); + usart_setup(); + + transfered = 0; + dma_write(tx, tx_len); + received = 0; + dma_read(rx, rx_len); + + /* Blink the LED (PA8) on the board with every transmitted byte. */ + while (1) { + gpio_toggle(GPIOA, GPIO8); /* LED on/off */ + while ( transfered != 1) { + if (received == 1) { + tx[1] = rx[0]; + tx[2] = rx[1]; + tx[3] = rx[2]; + tx[4] = rx[3]; + tx[5] = rx[4]; + tx[6] = rx[5]; + received = 0; + dma_read(rx, rx_len); + } + } + tx[0]++; + if (tx[0] > 'z') tx[0] = 'a'; + transfered = 0; + dma_write(tx, tx_len); + } + + return 0; +} From 06d6f3e0e64b49e8aab7ebe40896031b6c619172 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Wed, 14 Mar 2012 21:00:53 -0700 Subject: [PATCH 09/29] Made spi_init_master ignore CRC and SPE bits. --- lib/stm32/spi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/lib/stm32/spi.c b/lib/stm32/spi.c index af093ad5..828e1238 100644 --- a/lib/stm32/spi.c +++ b/lib/stm32/spi.c @@ -61,7 +61,10 @@ void spi_reset(u32 spi_peripheral) int spi_init_master(u32 spi, u32 br, u32 cpol, u32 cpha, u32 dff, u32 lsbfirst) { - u32 reg32 = 0; + u32 reg32 = SPI_CR1(spi); + + /* Reset all bits omitting SPE, CRCEN and CRCNEXT bits. */ + reg32 &= SPI_CR1_SPE | SPI_CR1_CRCEN | SPI_CR1_CRCNEXT; reg32 |= SPI_CR1_MSTR; /* Configure SPI as master. */ From 4e26104c188148431424063af75a1c99cdafd6ae Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Sat, 17 Mar 2012 16:17:40 -0700 Subject: [PATCH 10/29] Fixed position of PSIZE bits, thanks to Patrick for spotting this. --- include/libopencm3/stm32/f1/dma.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/libopencm3/stm32/f1/dma.h b/include/libopencm3/stm32/f1/dma.h index 897e0c5a..7f9abada 100644 --- a/include/libopencm3/stm32/f1/dma.h +++ b/include/libopencm3/stm32/f1/dma.h @@ -256,10 +256,10 @@ #define DMA_CCR_MSIZE_SHIFT 10 /* PSIZE[9:8]: Peripheral size */ -#define DMA_CCR_PSIZE_8BIT (0x0 << 10) -#define DMA_CCR_PSIZE_16BIT (0x1 << 10) -#define DMA_CCR_PSIZE_32BIT (0x2 << 10) -#define DMA_CCR_PSIZE_MASK (0x2 << 10) +#define DMA_CCR_PSIZE_8BIT (0x0 << 8) +#define DMA_CCR_PSIZE_16BIT (0x1 << 8) +#define DMA_CCR_PSIZE_32BIT (0x2 << 8) +#define DMA_CCR_PSIZE_MASK (0x2 << 8) #define DMA_CCR_PSIZE_SHIFT 8 /* MINC: Memory increment mode */ From 4fbd42148ad61642278344ba13615b56ffa3284e Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Sun, 18 Mar 2012 22:59:31 -0700 Subject: [PATCH 11/29] Added basic exception handling to the stm32 linker scripts. Thanks Mike Smith! --- lib/stm32/f1/libopencm3_stm32f1.ld | 32 +++++++++++++++--------------- lib/stm32/f2/libopencm3_stm32f2.ld | 32 +++++++++++++++--------------- lib/stm32/f4/libopencm3_stm32f4.ld | 32 +++++++++++++++--------------- 3 files changed, 48 insertions(+), 48 deletions(-) diff --git a/lib/stm32/f1/libopencm3_stm32f1.ld b/lib/stm32/f1/libopencm3_stm32f1.ld index 1dbc62aa..0624b96d 100644 --- a/lib/stm32/f1/libopencm3_stm32f1.ld +++ b/lib/stm32/f1/libopencm3_stm32f1.ld @@ -38,36 +38,36 @@ SECTIONS . = ALIGN(4); *(.rodata*) /* Read-only data */ . = ALIGN(4); - _etext = .; } >rom - . = ORIGIN(ram); + /* exception index - required due to libgcc.a issuing /0 exceptions */ + __exidx_start = .; + .ARM.exidx : { + *(.ARM.exidx*) + } > rom + __exidx_end = .; - .data : AT(_etext) { + + _etext = .; + + .data : { _data = .; *(.data*) /* Read-write initialized data */ . = ALIGN(4); _edata = .; - } >ram + } >ram AT >rom .bss : { *(.bss*) /* Read-write zero initialized data */ *(COMMON) . = ALIGN(4); _ebss = .; - } >ram AT >rom + } >ram - /* - * The .eh_frame section appears to be used for C++ exception handling. - * You may need to fix this if you're using C++. - */ - /DISCARD/ : { *(.eh_frame) } - - /* - * Another section used by C++ stuff, appears when using newlib with - * 64bit (long long) printf support - discard it for now. - */ - /DISCARD/ : { *(.ARM.exidx) } + /* exception unwind data - required due to libgcc.a issuing /0 exceptions */ + .ARM.extab : { + *(.ARM.extab*) + } >ram . = ALIGN(4); end = .; diff --git a/lib/stm32/f2/libopencm3_stm32f2.ld b/lib/stm32/f2/libopencm3_stm32f2.ld index 1dbc62aa..0624b96d 100644 --- a/lib/stm32/f2/libopencm3_stm32f2.ld +++ b/lib/stm32/f2/libopencm3_stm32f2.ld @@ -38,36 +38,36 @@ SECTIONS . = ALIGN(4); *(.rodata*) /* Read-only data */ . = ALIGN(4); - _etext = .; } >rom - . = ORIGIN(ram); + /* exception index - required due to libgcc.a issuing /0 exceptions */ + __exidx_start = .; + .ARM.exidx : { + *(.ARM.exidx*) + } > rom + __exidx_end = .; - .data : AT(_etext) { + + _etext = .; + + .data : { _data = .; *(.data*) /* Read-write initialized data */ . = ALIGN(4); _edata = .; - } >ram + } >ram AT >rom .bss : { *(.bss*) /* Read-write zero initialized data */ *(COMMON) . = ALIGN(4); _ebss = .; - } >ram AT >rom + } >ram - /* - * The .eh_frame section appears to be used for C++ exception handling. - * You may need to fix this if you're using C++. - */ - /DISCARD/ : { *(.eh_frame) } - - /* - * Another section used by C++ stuff, appears when using newlib with - * 64bit (long long) printf support - discard it for now. - */ - /DISCARD/ : { *(.ARM.exidx) } + /* exception unwind data - required due to libgcc.a issuing /0 exceptions */ + .ARM.extab : { + *(.ARM.extab*) + } >ram . = ALIGN(4); end = .; diff --git a/lib/stm32/f4/libopencm3_stm32f4.ld b/lib/stm32/f4/libopencm3_stm32f4.ld index 1dbc62aa..0624b96d 100644 --- a/lib/stm32/f4/libopencm3_stm32f4.ld +++ b/lib/stm32/f4/libopencm3_stm32f4.ld @@ -38,36 +38,36 @@ SECTIONS . = ALIGN(4); *(.rodata*) /* Read-only data */ . = ALIGN(4); - _etext = .; } >rom - . = ORIGIN(ram); + /* exception index - required due to libgcc.a issuing /0 exceptions */ + __exidx_start = .; + .ARM.exidx : { + *(.ARM.exidx*) + } > rom + __exidx_end = .; - .data : AT(_etext) { + + _etext = .; + + .data : { _data = .; *(.data*) /* Read-write initialized data */ . = ALIGN(4); _edata = .; - } >ram + } >ram AT >rom .bss : { *(.bss*) /* Read-write zero initialized data */ *(COMMON) . = ALIGN(4); _ebss = .; - } >ram AT >rom + } >ram - /* - * The .eh_frame section appears to be used for C++ exception handling. - * You may need to fix this if you're using C++. - */ - /DISCARD/ : { *(.eh_frame) } - - /* - * Another section used by C++ stuff, appears when using newlib with - * 64bit (long long) printf support - discard it for now. - */ - /DISCARD/ : { *(.ARM.exidx) } + /* exception unwind data - required due to libgcc.a issuing /0 exceptions */ + .ARM.extab : { + *(.ARM.extab*) + } >ram . = ALIGN(4); end = .; From 451a5e227df60b925790bccb5ee5963a9e3ff585 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Mon, 19 Mar 2012 17:38:24 -0700 Subject: [PATCH 12/29] Started some cleanup in the ADC headers and convenience code. --- include/libopencm3/stm32/f1/adc.h | 201 +++++++++++++++++++++++------- lib/stm32/f1/adc.c | 8 +- 2 files changed, 163 insertions(+), 46 deletions(-) diff --git a/include/libopencm3/stm32/f1/adc.h b/include/libopencm3/stm32/f1/adc.h index a4eb19cd..838bbeb5 100644 --- a/include/libopencm3/stm32/f1/adc.h +++ b/include/libopencm3/stm32/f1/adc.h @@ -150,77 +150,194 @@ /* --- ADC_CR1 values ------------------------------------------------------ */ +/* AWDEN: Analog watchdog enable on regular channels */ #define ADC_CR1_AWDEN (1 << 23) + +/* JAWDEN: Analog watchdog enable on injected channels */ #define ADC_CR1_JAWDEN (1 << 22) -#define ADC_CR1_DUALMOD_LSB 16 -#define ADC_CR1_DUALMOD_MSK (0xf << ADC_DUALMOD_LSB) /* ADC1 only */ -#define ADC_CR1_DISCNUM_LSB 13 -#define ADC_CR1_DISCNUM_MSK (0x7 << ADC_DISCNUM_LSB) + +/* Note: Bits [21:20] are reserved, and must be kept at reset value. */ + +/* DUALMOD[3:0]: Dual mode selection. (ADC1 only) */ +/* Legend: + * IND: Independent mode. + * CRSISM: Combined regular simultaneous + injected simultaneous mode. + * CRSATM: Combined regular simultaneous + alternate trigger mode. + * CISFIM: Combined injected simultaneous + fast interleaved mode. + * CISSIM: Combined injected simultaneous + slow interleaved mode. + * ISM: Injected simultaneous mode only. + * RSM: Regular simultaneous mode only. + * FIM: Fast interleaved mode only. + * SIM: Slow interleaved mode only. + * ATM: Alternate trigger mode only. + */ +#define ADC_CR1_DUALMOD_IND (0x0 << 16) +#define ADC_CR1_DUALMOD_CRSISM (0x1 << 16) +#define ADC_CR1_DUALMOD_CRSATM (0x2 << 16) +#define ADC_CR1_DUALMOD_CISFIM (0x3 << 16) +#define ADC_CR1_DUALMOD_CISSIM (0x4 << 16) +#define ADC_CR1_DUALMOD_ISM (0x5 << 16) +#define ADC_CR1_DUALMOD_RSM (0x6 << 16) +#define ADC_CR1_DUALMOD_FIM (0x7 << 16) +#define ADC_CR1_DUALMOD_SIM (0x8 << 16) +#define ADC_CR1_DUALMOD_ATM (0x9 << 16) +#define ADC_CR1_DUALMOD_MASK (0xF << 16) +#define ADC_CR1_DUALMOD_SHIFT 16 + +/* DISCNUM[2:0]: Discontinous mode channel count. */ +#define ADC_CR1_DISCNUM_1CHANNELS (0x0 << 13) +#define ADC_CR1_DISCNUM_2CHANNELS (0x1 << 13) +#define ADC_CR1_DISCNUM_3CHANNELS (0x2 << 13) +#define ADC_CR1_DISCNUM_4CHANNELS (0x3 << 13) +#define ADC_CR1_DISCNUM_5CHANNELS (0x4 << 13) +#define ADC_CR1_DISCNUM_6CHANNELS (0x5 << 13) +#define ADC_CR1_DISCNUM_7CHANNELS (0x6 << 13) +#define ADC_CR1_DISCNUM_8CHANNELS (0x7 << 13) +#define ADC_CR1_DISCNUM_MASK (0x7 << 13) +#define ADC_CR1_DISCNUM_SHIFT 13 + +/* JDISCEN: Discontinous mode on injected channels. */ #define ADC_CR1_JDISCEN (1 << 12) + +/* DISCEN: Discontinous mode on regular channels. */ #define ADC_CR1_DISCEN (1 << 11) + +/* JAUTO: Automatic Injection Group conversion. */ #define ADC_CR1_JAUTO (1 << 10) + +/* AWDSGL: Enable the watchdog on a single channel in scan mode. */ #define ADC_CR1_AWDSGL (1 << 9) + +/* SCAN: Scan mode. */ #define ADC_CR1_SCAN (1 << 8) + +/* JEOCIE: Interrupt enable for injected channels. */ #define ADC_CR1_JEOCIE (1 << 7) + +/* AWDIE: Analog watchdog interrupt enable. */ #define ADC_CR1_AWDIE (1 << 6) + +/* EOCIE: Interrupt enable EOC. */ #define ADC_CR1_EOCIE (1 << 5) -#define ADC_CR1_AWDCH_LSB 0 -#define ADC_CR1_AWDCH_MSK (0x1f << ADC_AWDCH_LSB) + +/* AWDCH[4:0]: Analog watchdog channel bits. (Up to 17 other values reserved) */ +/* Notes: + * ADC1: Analog channel 16 and 17 are internally connected to the temperature + * sensor and V_REFINT, respectively. + * ADC2: Analog channel 16 and 17 are internally connected to V_SS. + * ADC3: Analog channel 9, 14, 15, 16 and 17 are internally connected to V_SS. + */ +#define ADC_CR1_AWDCH_CHANNEL0 (0x00 << 0) +#define ADC_CR1_AWDCH_CHANNEL1 (0x01 << 0) +#define ADC_CR1_AWDCH_CHANNEL2 (0x02 << 0) +#define ADC_CR1_AWDCH_CHANNEL3 (0x03 << 0) +#define ADC_CR1_AWDCH_CHANNEL4 (0x04 << 0) +#define ADC_CR1_AWDCH_CHANNEL5 (0x05 << 0) +#define ADC_CR1_AWDCH_CHANNEL6 (0x06 << 0) +#define ADC_CR1_AWDCH_CHANNEL7 (0x07 << 0) +#define ADC_CR1_AWDCH_CHANNEL8 (0x08 << 0) +#define ADC_CR1_AWDCH_CHANNEL9 (0x09 << 0) +#define ADC_CR1_AWDCH_CHANNEL10 (0x0A << 0) +#define ADC_CR1_AWDCH_CHANNEL11 (0x0B << 0) +#define ADC_CR1_AWDCH_CHANNEL12 (0x0C << 0) +#define ADC_CR1_AWDCH_CHANNEL13 (0x0D << 0) +#define ADC_CR1_AWDCH_CHANNEL14 (0x0E << 0) +#define ADC_CR1_AWDCH_CHANNEL15 (0x0F << 0) +#define ADC_CR1_AWDCH_CHANNEL16 (0x10 << 0) +#define ADC_CR1_AWDCH_CHANNEL17 (0x11 << 0) +#define ADC_CR1_AWDCH_MASK (0x1F << 0) +#define ADC_CR1_AWDCH_SHIFT 0 /* --- ADC_CR2 values ------------------------------------------------------ */ -#define ADC_CR2_TSVREFE (1 << 23) /* ADC1 only! */ +/* TSVREFE: Temperature sensor and V_REFINT enable. (ADC1 only!) */ +#define ADC_CR2_TSVREFE (1 << 23) + +/* SWSTART: Start conversion of regular channels. */ #define ADC_CR2_SWSTART (1 << 22) + +/* JSWSTART: Start conversion of injected channels. */ #define ADC_CR2_JSWSTART (1 << 21) + +/* EXTTRIG: External trigger conversion mode for regular channels. */ #define ADC_CR2_EXTTRIG (1 << 20) -#define ADC_CR2_EXTSEL_LSB 17 -#define ADC_CR2_EXTSEL_MSK (0x7 << ADC_EXTSEL_LSB) + +/* EXTSEL[2:0]: External event select for regular group. */ /* The following are only valid for ADC1 and ADC2. */ -#define ADC_CR2_EXTSEL_TIM1_CC1 0x0 -#define ADC_CR2_EXTSEL_TIM1_CC2 0x1 -#define ADC_CR2_EXTSEL_TIM1_CC3 0x2 -#define ADC_CR2_EXTSEL_TIM2_CC2 0x3 -#define ADC_CR2_EXTSEL_TIM3_TRGO 0x4 -#define ADC_CR2_EXTSEL_TIM4_CC4 0x5 -#define ADC_CR2_EXTSEL_EXTI11 0x6 -#define ADC_CR2_EXTSEL_SWSTART 0x7 +#define ADC_CR2_EXTSEL_TIM1_CC1 (0x0 << 17) +#define ADC_CR2_EXTSEL_TIM1_CC2 (0x1 << 17) +#define ADC_CR2_EXTSEL_TIM1_CC3 (0x2 << 17) +#define ADC_CR2_EXTSEL_TIM2_CC2 (0x3 << 17) +#define ADC_CR2_EXTSEL_TIM3_TRGO (0x4 << 17) +#define ADC_CR2_EXTSEL_TIM4_CC4 (0x5 << 17) +#define ADC_CR2_EXTSEL_EXTI11 (0x6 << 17) +#define ADC_CR2_EXTSEL_SWSTART (0x7 << 17) /* The following are only valid for ADC3 */ -#define ADC_CR2_EXTSEL_TIM3_CC1 0x0 -#define ADC_CR2_EXTSEL_TIM2_CC3 0x1 -#define ADC_CR2_EXTSEL_TIM8_CC1 0x3 -#define ADC_CR2_EXTSEL_TIM8_TRGO 0x4 -#define ADC_CR2_EXTSEL_TIM5_CC1 0x5 -#define ADC_CR2_EXTSEL_TIM5_CC3 0x6 +#define ADC_CR2_EXTSEL_TIM3_CC1 (0x0 << 17) +#define ADC_CR2_EXTSEL_TIM2_CC3 (0x1 << 17) +#define ADC_CR2_EXTSEL_TIM8_CC1 (0x3 << 17) +#define ADC_CR2_EXTSEL_TIM8_TRGO (0x4 << 17) +#define ADC_CR2_EXTSEL_TIM5_CC1 (0x5 << 17) +#define ADC_CR2_EXTSEL_TIM5_CC3 (0x6 << 17) -/* Bit 16: reserved, must be kept cleared */ +#define ADC_CR2_EXTSEL_MASK (0x7 << 17) +#define ADC_CR2_EXTSEL_SHIFT 17 + +/* Note: Bit 16 is reserved, must be kept at reset value. */ + +/* JEXTTRIG: External trigger conversion mode for injected channels. */ #define ADC_CR2_JEXTTRIG (1 << 15) -#define ADC_CR2_JEXTSEL_LSB 12 -#define ADC_CR2_JEXTSEL_MSK (0x7 << ADC_JEXTSEL_LSB) + +/* JEXTSEL[2:0]: External event selection for injected group. */ /* The following are only valid for ADC1 and ADC2. */ -#define ADC_CR2_JEXTSEL_TIM1_TRGO 0x0 -#define ADC_CR2_JEXTSEL_TIM1_CC4 0x1 -#define ADC_CR2_JEXTSEL_TIM2_TRGO 0x2 -#define ADC_CR2_JEXTSEL_TIM2_CC1 0x3 -#define ADC_CR2_JEXTSEL_TIM3_CC4 0x4 -#define ADC_CR2_JEXTSEL_TIM4_TRGO 0x5 -#define ADC_CR2_JEXTSEL_EXTI15 0x6 -#define ADC_CR2_JEXTSEL_JSWSTART 0x7 +#define ADC_CR2_JEXTSEL_TIM1_TRGO (0x0 << 12) +#define ADC_CR2_JEXTSEL_TIM1_CC4 (0x1 << 12) +#define ADC_CR2_JEXTSEL_TIM2_TRGO (0x2 << 12) +#define ADC_CR2_JEXTSEL_TIM2_CC1 (0x3 << 12) +#define ADC_CR2_JEXTSEL_TIM3_CC4 (0x4 << 12) +#define ADC_CR2_JEXTSEL_TIM4_TRGO (0x5 << 12) +#define ADC_CR2_JEXTSEL_EXTI15 (0x6 << 12) +#define ADC_CR2_JEXTSEL_JSWSTART (0x7 << 12) /* The following are the different meanings for ADC3 only. */ -#define ADC_CR2_JEXTSEL_TIM4_CC3 0x2 -#define ADC_CR2_JEXTSEL_TIM8_CC2 0x3 -#define ADC_CR2_JEXTSEL_TIM8_CC4 0x4 -#define ADC_CR2_JEXTSEL_TIM5_TRGO 0x5 -#define ADC_CR2_JEXTSEL_TIM5_CC4 0x6 +#define ADC_CR2_JEXTSEL_TIM4_CC3 (0x2 << 12) +#define ADC_CR2_JEXTSEL_TIM8_CC2 (0x3 << 12) +#define ADC_CR2_JEXTSEL_TIM8_CC4 (0x4 << 12) +#define ADC_CR2_JEXTSEL_TIM5_TRGO (0x5 << 12) +#define ADC_CR2_JEXTSEL_TIM5_CC4 (0x6 << 12) +#define ADC_CR2_JEXTSEL_MASK (0x7 << 12) +#define ADC_CR2_JEXTSEL_SHIFT 12 + +/* ALIGN: Data alignement. */ +#define ADC_CR2_ALIGN_RIGHT (0 << 11) +#define ADC_CR2_ALIGN_LEFT (1 << 11) #define ADC_CR2_ALIGN (1 << 11) -#define ADC_CR2_DMA (1 << 8) /* ADC 1 & 3 only! */ -/* Bits [7:4] have to be kept 0. */ + +/* Note: Bits [10:9] are reserved and must be kept at reset value. */ + +/* DMA: Direct memory access mode. (ADC1 and ADC3 only!) */ +#define ADC_CR2_DMA (1 << 8) + +/* Note: Bits [7:4] are reserved and must be kept at reset value. */ + +/* RSTCAL: Reset calibration. */ #define ADC_CR2_RSTCAL (1 << 3) + +/* CAL: A/D Calibration. */ #define ADC_CR2_CAL (1 << 2) + +/* CONT: Continous conversion. */ #define ADC_CR2_CONT (1 << 1) -#define ADC_CR2_ADON (1 << 0) /* Must be separately written. */ + +/* ADON: A/D converter On/Off. */ +/* Note: If any other bit in this register apart from ADON is changed at the + * same time, then conversion is not triggered. This is to prevent triggering + * an erroneous conversion. + * Conclusion: Must be separately written. + */ +#define ADC_CR2_ADON (1 << 0) /* --- ADC_SMPR1 values ---------------------------------------------------- */ diff --git a/lib/stm32/f1/adc.c b/lib/stm32/f1/adc.c index 7df1835c..a8d80373 100644 --- a/lib/stm32/f1/adc.c +++ b/lib/stm32/f1/adc.c @@ -197,9 +197,9 @@ void adc_enable_external_trigger_regular(u32 adc, u8 trigger) { u32 reg32; - reg32 = (ADC_CR2(adc) & 0xfff1ffff); /* Clear bits [19:17]. */ + reg32 = (ADC_CR2(adc) & ~(ADC_CR2_EXTSEL_MASK)); if (trigger < 8) - reg32 |= (trigger << ADC_CR2_EXTSEL_LSB); + reg32 |= (trigger); ADC_CR2(adc) = reg32; ADC_CR2(adc) |= ADC_CR2_EXTTRIG; } @@ -213,9 +213,9 @@ void adc_enable_external_trigger_injected(u32 adc, u8 trigger) { u32 reg32; - reg32 = (ADC_CR2(adc) & 0xffff8fff); /* Clear bits [12:14]. */ + reg32 = (ADC_CR2(adc) & ~(ADC_CR2_JEXTSEL_MASK)); /* Clear bits [12:14]. */ if (trigger < 8) - reg32 |= (trigger << ADC_CR2_JEXTSEL_LSB); + reg32 |= (trigger); ADC_CR2(adc) = reg32; ADC_CR2(adc) |= ADC_CR2_JEXTTRIG; } From ec34e21ead89ab750b3e7cc88c42f05f071992b5 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Mon, 19 Mar 2012 20:20:05 -0700 Subject: [PATCH 13/29] Changed parameter size for trigger enable. --- include/libopencm3/stm32/f1/adc.h | 6 +++--- lib/stm32/f1/adc.c | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/include/libopencm3/stm32/f1/adc.h b/include/libopencm3/stm32/f1/adc.h index 838bbeb5..563e75dc 100644 --- a/include/libopencm3/stm32/f1/adc.h +++ b/include/libopencm3/stm32/f1/adc.h @@ -298,7 +298,7 @@ #define ADC_CR2_JEXTSEL_TIM3_CC4 (0x4 << 12) #define ADC_CR2_JEXTSEL_TIM4_TRGO (0x5 << 12) #define ADC_CR2_JEXTSEL_EXTI15 (0x6 << 12) -#define ADC_CR2_JEXTSEL_JSWSTART (0x7 << 12) +#define ADC_CR2_JEXTSEL_JSWSTART (0x7 << 12) /* Software start. */ /* The following are the different meanings for ADC3 only. */ #define ADC_CR2_JEXTSEL_TIM4_CC3 (0x2 << 12) @@ -511,9 +511,9 @@ void adc_enable_temperature_sensor(u32 adc); void adc_disable_temperature_sensor(u32 adc); void adc_start_conversion_regular(u32 adc); void adc_start_conversion_injected(u32 adc); -void adc_enable_external_trigger_regular(u32 adc, u8 trigger); +void adc_enable_external_trigger_regular(u32 adc, u32 trigger); void adc_disable_external_trigger_regular(u32 adc); -void adc_enable_external_trigger_injected(u32 adc, u8 trigger); +void adc_enable_external_trigger_injected(u32 adc, u32 trigger); void adc_disable_external_trigger_injected(u32 adc); void adc_set_left_aligned(u32 adc); void adc_set_right_aligned(u32 adc); diff --git a/lib/stm32/f1/adc.c b/lib/stm32/f1/adc.c index a8d80373..f07164fd 100644 --- a/lib/stm32/f1/adc.c +++ b/lib/stm32/f1/adc.c @@ -193,7 +193,7 @@ void adc_start_conversion_injected(u32 adc) while (ADC_CR2(adc) & ADC_CR2_JSWSTART); } -void adc_enable_external_trigger_regular(u32 adc, u8 trigger) +void adc_enable_external_trigger_regular(u32 adc, u32 trigger) { u32 reg32; @@ -209,7 +209,7 @@ void adc_disable_external_trigger_regular(u32 adc) ADC_CR2(adc) &= ~ADC_CR2_EXTTRIG; } -void adc_enable_external_trigger_injected(u32 adc, u8 trigger) +void adc_enable_external_trigger_injected(u32 adc, u32 trigger) { u32 reg32; From 26de4cb9d6e7c335c18f3f5e0a4da7c4170851f3 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Mon, 19 Mar 2012 23:09:18 -0700 Subject: [PATCH 14/29] Constand value for resetting CAN_TDTxR was too big. Fixed. --- lib/stm32/f1/can.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/stm32/f1/can.c b/lib/stm32/f1/can.c index 151c47cd..fc7e0e75 100644 --- a/lib/stm32/f1/can.c +++ b/lib/stm32/f1/can.c @@ -228,7 +228,7 @@ int can_transmit(u32 canport, u32 id, bool ext, bool rtr, u8 length, u8 *data) CAN_TIxR(canport, mailbox) |= CAN_TIxR_RTR; /* Set */ /* Set the DLC. */ - CAN_TDTxR(canport, mailbox) &= 0xFFFFFFFF0; + CAN_TDTxR(canport, mailbox) &= 0xFFFFFFF0; CAN_TDTxR(canport, mailbox) |= length & CAN_TDTxR_DLC_MASK; /* Set the data. */ From 87ea496ca768d18e51d8654cbad9cb261a881b1b Mon Sep 17 00:00:00 2001 From: Fergus Noble Date: Wed, 21 Mar 2012 20:16:10 -0700 Subject: [PATCH 15/29] Revert "Fix setting alternate port functions on the STM32F4." This was also fixed in ac29b654a992a4855626fc0b92874d3847914f85 in a different way. I think the mask definition should be left with 1s indicating the bits of interest. This reverts commit e11185d47d0a2fea6d2782761edd5fd489541512. --- include/libopencm3/stm32/f4/gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/libopencm3/stm32/f4/gpio.h b/include/libopencm3/stm32/f4/gpio.h index 4981c2a1..a5b4361c 100644 --- a/include/libopencm3/stm32/f4/gpio.h +++ b/include/libopencm3/stm32/f4/gpio.h @@ -232,7 +232,7 @@ /* See Datasheet Table 6 (pg. 48) for alternate function mappings. */ #define GPIO_AFR(n, af) (af << ((n) * 4)) -#define GPIO_AFR_MASK(n) ~(0xf << ((n) * 4)) +#define GPIO_AFR_MASK(n) (0xf << ((n) * 4)) #define GPIO_AF0 0x0 #define GPIO_AF1 0x1 #define GPIO_AF2 0x2 From a30fc96c59ee13b5cd721b61b370f003ce7cf8b3 Mon Sep 17 00:00:00 2001 From: Fergus Noble Date: Wed, 21 Mar 2012 20:19:36 -0700 Subject: [PATCH 16/29] Revert "Fix setting alternate port functions on the STM32F2." This was also fixed in ac29b654a992a4855626fc0b92874d3847914f85 in a different way. I think the mask definition should be left with 1s indicating the bits of interest. See also 87ea496ca768d18e51d8654cbad9cb261a881b1b. This reverts commit 2433f17e7341d6afcda24d395d0b93c50a37b7b1. --- include/libopencm3/stm32/f2/gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/libopencm3/stm32/f2/gpio.h b/include/libopencm3/stm32/f2/gpio.h index 63d2880a..1a9fd0fb 100644 --- a/include/libopencm3/stm32/f2/gpio.h +++ b/include/libopencm3/stm32/f2/gpio.h @@ -232,7 +232,7 @@ /* See Datasheet Table 6 (pg. 48) for alternate function mappings. */ #define GPIO_AFR(n, af) (af << ((n) * 4)) -#define GPIO_AFR_MASK(n) ~(0xf << ((n) * 4)) +#define GPIO_AFR_MASK(n) (0xf << ((n) * 4)) #define GPIO_AF0 0x0 #define GPIO_AF1 0x1 #define GPIO_AF2 0x2 From f76e99c98d5ed2e9bb3d4f4aa77abb4332980979 Mon Sep 17 00:00:00 2001 From: Daniel O'Connor Date: Thu, 22 Mar 2012 20:01:55 +1030 Subject: [PATCH 17/29] Add mask for SWJ bits. (These are write only) --- include/libopencm3/stm32/f1/gpio.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/libopencm3/stm32/f1/gpio.h b/include/libopencm3/stm32/f1/gpio.h index 440b71c1..e4e11bec 100644 --- a/include/libopencm3/stm32/f1/gpio.h +++ b/include/libopencm3/stm32/f1/gpio.h @@ -701,6 +701,7 @@ /* 27 reserved */ /* SWJ_CFG[2:0]: Serial wire JTAG configuration */ +#define AFIO_MAPR_SWJ_MASK (0x7 << 24) #define AFIO_MAPR_SWJ_CFG_FULL_SWJ (0x0 << 24) #define AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST (0x1 << 24) #define AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON (0x2 << 24) From 5a463f03e111506a28a8907e77cc4a13eaea1397 Mon Sep 17 00:00:00 2001 From: Daniel O'Connor Date: Thu, 22 Mar 2012 20:02:26 +1030 Subject: [PATCH 18/29] Cast PERIPH_BASE to unsigned otherwise certain operations result in build problems (overflow signed type). --- include/libopencm3/stm32/f1/memorymap.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/libopencm3/stm32/f1/memorymap.h b/include/libopencm3/stm32/f1/memorymap.h index d2c3651a..f8528d41 100644 --- a/include/libopencm3/stm32/f1/memorymap.h +++ b/include/libopencm3/stm32/f1/memorymap.h @@ -25,7 +25,7 @@ /* --- STM32 specific peripheral definitions ------------------------------- */ /* Memory map for all busses */ -#define PERIPH_BASE 0x40000000 +#define PERIPH_BASE ((u32)0x40000000) #define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000) #define PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000) #define PERIPH_BASE_AHB (PERIPH_BASE + 0x18000) From 404353b1aa8b91b50e05c705dfc1ed470625da25 Mon Sep 17 00:00:00 2001 From: Daniel O'Connor Date: Thu, 22 Mar 2012 20:03:22 +1030 Subject: [PATCH 19/29] - Add FSMC helper macros. IMO FSMC_BTR_ACCMOD aren't much use, but I left them in case someone uses them. - FSMC_BASE is already in memorymap.h so don't define it here. --- include/libopencm3/stm32/fsmc.h | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/include/libopencm3/stm32/fsmc.h b/include/libopencm3/stm32/fsmc.h index e9451239..3e35538a 100644 --- a/include/libopencm3/stm32/fsmc.h +++ b/include/libopencm3/stm32/fsmc.h @@ -25,9 +25,6 @@ /* --- Convenience macros -------------------------------------------------- */ -/* TODO: Move to memorymap.h? */ -#define FSMC_BASE 0xa0000000 - #define FSMC_BANK1_BASE 0x60000000 /* NOR / PSRAM */ #define FSMC_BANK2_BASE 0x70000000 /* NAND flash */ #define FSMC_BANK3_BASE 0x80000000 /* NAND flash */ @@ -142,26 +139,39 @@ /* Bits [31:30]: Reserved. */ +/* Same for read and write */ +#define FSMC_BTx_ACCMOD_A (0) +#define FSMC_BTx_ACCMOD_B (1) +#define FSMC_BTx_ACCMOD_C (2) +#define FSMC_BTx_ACCMOD_D (3) + /* ACCMOD[29:28]: Access mode */ #define FSMC_BTR_ACCMOD (1 << 28) +#define FSMC_BTR_ACCMODx(x) (((x) & 0x03) << 28) /* DATLAT[27:24]: Data latency (for synchronous burst NOR flash) */ #define FSMC_BTR_DATLAT (1 << 24) +#define FSMC_BTR_DATLATx(x) (((x) & 0x0f) << 24) /* CLKDIV[23:20]: Clock divide ratio (for CLK signal) */ #define FSMC_BTR_CLKDIV (1 << 20) +#define FSMC_BTR_CLKDIVx(x) (((x) & 0x0f) << 20) /* BUSTURN[19:16]: Bus turnaround phase duration */ #define FSMC_BTR_BUSTURN (1 << 16) +#define FSMC_BTR_BUSTURNx(x) (((x) & 0x0f) << 16) /* DATAST[15:8]: Data-phase duration */ #define FSMC_BTR_DATAST (1 << 8) +#define FSMC_BTR_DATASTx(x) (((x) & 0xff) << 8) /* ADDHLD[7:4]: Address-hold phase duration */ #define FSMC_BTR_ADDHLD (1 << 4) +#define FSMC_BTR_ADDHLDx(x) (((x) & 0x0f) << 4) /* ADDSET[3:0]: Address setup phase duration */ #define FSMC_BTR_ADDSET (1 << 0) +#define FSMC_BTR_ADDSETx(x) (((x) & 0x0f) << 0) /* --- FSMC_BWTRx values --------------------------------------------------- */ From 60788fd9d2bfc8741190cb11c96251fb2f056ea0 Mon Sep 17 00:00:00 2001 From: Taylor Vesely Date: Wed, 21 Mar 2012 15:51:26 -0600 Subject: [PATCH 20/29] Started porting to LPC17xx. Created file stubs and started conversion. --- examples/lpc17xx/Makefile.include | 0 .../blueboard-lpc1768-h.ld | 31 +++++++++ .../blueboard-lpc1768-h/miniblink/Makefile | 0 .../blueboard-lpc1768-h/miniblink/README | 9 +++ .../blueboard-lpc1768-h/miniblink/miniblink.c | 0 include/libopencm3/lpc17xx/gpio.h | 0 include/libopencm3/lpc17xx/memorymap.h | 68 +++++++++++++++++++ lib/lpc17xx/Makefile | 0 lib/lpc17xx/gpio.c | 0 lib/lpc17xx/libopencm3_lpc17xx.ld | 0 10 files changed, 108 insertions(+) create mode 100644 examples/lpc17xx/Makefile.include create mode 100644 examples/lpc17xx/blueboard-lpc1768-h/blueboard-lpc1768-h.ld create mode 100644 examples/lpc17xx/blueboard-lpc1768-h/miniblink/Makefile create mode 100644 examples/lpc17xx/blueboard-lpc1768-h/miniblink/README create mode 100644 examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c create mode 100644 include/libopencm3/lpc17xx/gpio.h create mode 100644 include/libopencm3/lpc17xx/memorymap.h create mode 100644 lib/lpc17xx/Makefile create mode 100644 lib/lpc17xx/gpio.c create mode 100644 lib/lpc17xx/libopencm3_lpc17xx.ld diff --git a/examples/lpc17xx/Makefile.include b/examples/lpc17xx/Makefile.include new file mode 100644 index 00000000..e69de29b diff --git a/examples/lpc17xx/blueboard-lpc1768-h/blueboard-lpc1768-h.ld b/examples/lpc17xx/blueboard-lpc1768-h/blueboard-lpc1768-h.ld new file mode 100644 index 00000000..b8cff56b --- /dev/null +++ b/examples/lpc17xx/blueboard-lpc1768-h/blueboard-lpc1768-h.ld @@ -0,0 +1,31 @@ + +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Uwe Hermann + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +/* Linker script for Blueboard-LPC1768-H (LPC1768, 512K flash, 32K SRAM). */ + +/* Define memory regions. */ +MEMORY +{ + rom (rx) : ORIGIN = 0x00000000, LENGTH = 512K + ram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K +} + +/* Include the common ld script. */ +INCLUDE libopencm3_lpc17xx.ld diff --git a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/Makefile b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/Makefile new file mode 100644 index 00000000..e69de29b diff --git a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/README b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/README new file mode 100644 index 00000000..7354adf5 --- /dev/null +++ b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/README @@ -0,0 +1,9 @@ +------------------------------------------------------------------------------ +README +------------------------------------------------------------------------------ + +This is the smallest-possible example program using libopencm3. + +It's intended for the NXP LPC1768-based NGX Blueboard-LPC1768-H eval board (see +http://shop.ngxtechnologies.com/product_info.php?cPath=21&products_id=65). It should blink +a LED on the board. diff --git a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c new file mode 100644 index 00000000..e69de29b diff --git a/include/libopencm3/lpc17xx/gpio.h b/include/libopencm3/lpc17xx/gpio.h new file mode 100644 index 00000000..e69de29b diff --git a/include/libopencm3/lpc17xx/memorymap.h b/include/libopencm3/lpc17xx/memorymap.h new file mode 100644 index 00000000..879a97d3 --- /dev/null +++ b/include/libopencm3/lpc17xx/memorymap.h @@ -0,0 +1,68 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Uwe Hermann + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#ifndef LPC17XX_MEMORYMAP_H +#define LPC17XX_MEMORYMAP_H + +#include + +/* --- LPC17XX specific peripheral definitions ----------------------------- */ + +/* Memory map for all busses */ +#define PERIPH_BASE_APB 0x40000000 +#define PERIPH_BASE_AHB 0x20000000 + +/* Register boundary addresses */ + +/* APB */ +#define WDT_BASE (PERIPH_BASE_APB + 0x00000) +#define TIMER0_BASE (PERIPH_BASE_APB + 0x04000) +#define TIMER1_BASE (PERIPH_BASE_APB + 0x08000) +#define TIMER0_16BIT_BASE (PERIPH_BASE_APB + 0x0c000) +#define TIMER1_16BIT_BASE (PERIPH_BASE_APB + 0x10000) +#define TIMER0_32BIT_BASE (PERIPH_BASE_APB + 0x14000) +#define TIMER1_32BIT_BASE (PERIPH_BASE_APB + 0x18000) +#define ADC_BASE (PERIPH_BASE_APB + 0x1c000) +#define USB_BASE (PERIPH_BASE_APB + 0x20000) + +#define I2C_BASE (PERIPH_BASE_APB + 0x00000) +#define WDT_BASE (PERIPH_BASE_APB + 0x04000) +#define UART_BASE (PERIPH_BASE_APB + 0x08000) +#define TIMER0_16BIT_BASE (PERIPH_BASE_APB + 0x0c000) +#define TIMER1_16BIT_BASE (PERIPH_BASE_APB + 0x10000) +#define TIMER0_32BIT_BASE (PERIPH_BASE_APB + 0x14000) +#define TIMER1_32BIT_BASE (PERIPH_BASE_APB + 0x18000) +#define ADC_BASE (PERIPH_BASE_APB + 0x1c000) +#define USB_BASE (PERIPH_BASE_APB + 0x20000) +/* PERIPH_BASE_APB + 0x28000 (0x4002 8000 - 0x4003 7FFF): Reserved */ +#define PMU_BASE (PERIPH_BASE_APB + 0x38000) +#define FLASH_BASE (PERIPH_BASE_APB + 0x3c000) +#define SSP_BASE (PERIPH_BASE_APB + 0x40000) +#define IOCONFIG_BASE (PERIPH_BASE_APB + 0x44000) +#define SYSCTRL_BASE (PERIPH_BASE_APB + 0x48000) +/* PERIPH_BASE_APB + 0x4c000 (0x4004 c000 - 0x4007 FFFF): Reserved */ + +/* AHB */ +#define GPIO_PIO0_BASE (PERIPH_BASE_AHB + 0x00000) +#define GPIO_PIO1_BASE (PERIPH_BASE_AHB + 0x10000) +#define GPIO_PIO2_BASE (PERIPH_BASE_AHB + 0x20000) +#define GPIO_PIO3_BASE (PERIPH_BASE_AHB + 0x30000) +/* PERIPH_BASE_AHB + 0x40000 (0x5004 0000 - 0x501F FFFF): Reserved */ + +#endif diff --git a/lib/lpc17xx/Makefile b/lib/lpc17xx/Makefile new file mode 100644 index 00000000..e69de29b diff --git a/lib/lpc17xx/gpio.c b/lib/lpc17xx/gpio.c new file mode 100644 index 00000000..e69de29b diff --git a/lib/lpc17xx/libopencm3_lpc17xx.ld b/lib/lpc17xx/libopencm3_lpc17xx.ld new file mode 100644 index 00000000..e69de29b From cec41eb0c4bd3d2a65f09019f505ca80fbbcb4c4 Mon Sep 17 00:00:00 2001 From: Taylor Vesely Date: Wed, 21 Mar 2012 17:13:45 -0600 Subject: [PATCH 21/29] Filled in the APB0 memory map for the lpc17xx. Also set values for the GPIO on AHB. --- .gitignore | 1 + include/libopencm3/lpc17xx/memorymap.h | 63 ++++++++++++-------------- 2 files changed, 31 insertions(+), 33 deletions(-) diff --git a/.gitignore b/.gitignore index 42d67612..f0c86ce4 100644 --- a/.gitignore +++ b/.gitignore @@ -6,5 +6,6 @@ *.srec *.a *.elf +*.swp \#* .\#* diff --git a/include/libopencm3/lpc17xx/memorymap.h b/include/libopencm3/lpc17xx/memorymap.h index 879a97d3..11144422 100644 --- a/include/libopencm3/lpc17xx/memorymap.h +++ b/include/libopencm3/lpc17xx/memorymap.h @@ -25,44 +25,41 @@ /* --- LPC17XX specific peripheral definitions ----------------------------- */ /* Memory map for all busses */ -#define PERIPH_BASE_APB 0x40000000 +#define PERIPH_BASE_APB0 0x40000000 +#define PERIPH_BASE_APB1 0x40080000 #define PERIPH_BASE_AHB 0x20000000 /* Register boundary addresses */ -/* APB */ -#define WDT_BASE (PERIPH_BASE_APB + 0x00000) -#define TIMER0_BASE (PERIPH_BASE_APB + 0x04000) -#define TIMER1_BASE (PERIPH_BASE_APB + 0x08000) -#define TIMER0_16BIT_BASE (PERIPH_BASE_APB + 0x0c000) -#define TIMER1_16BIT_BASE (PERIPH_BASE_APB + 0x10000) -#define TIMER0_32BIT_BASE (PERIPH_BASE_APB + 0x14000) -#define TIMER1_32BIT_BASE (PERIPH_BASE_APB + 0x18000) -#define ADC_BASE (PERIPH_BASE_APB + 0x1c000) -#define USB_BASE (PERIPH_BASE_APB + 0x20000) - -#define I2C_BASE (PERIPH_BASE_APB + 0x00000) -#define WDT_BASE (PERIPH_BASE_APB + 0x04000) -#define UART_BASE (PERIPH_BASE_APB + 0x08000) -#define TIMER0_16BIT_BASE (PERIPH_BASE_APB + 0x0c000) -#define TIMER1_16BIT_BASE (PERIPH_BASE_APB + 0x10000) -#define TIMER0_32BIT_BASE (PERIPH_BASE_APB + 0x14000) -#define TIMER1_32BIT_BASE (PERIPH_BASE_APB + 0x18000) -#define ADC_BASE (PERIPH_BASE_APB + 0x1c000) -#define USB_BASE (PERIPH_BASE_APB + 0x20000) -/* PERIPH_BASE_APB + 0x28000 (0x4002 8000 - 0x4003 7FFF): Reserved */ -#define PMU_BASE (PERIPH_BASE_APB + 0x38000) -#define FLASH_BASE (PERIPH_BASE_APB + 0x3c000) -#define SSP_BASE (PERIPH_BASE_APB + 0x40000) -#define IOCONFIG_BASE (PERIPH_BASE_APB + 0x44000) -#define SYSCTRL_BASE (PERIPH_BASE_APB + 0x48000) -/* PERIPH_BASE_APB + 0x4c000 (0x4004 c000 - 0x4007 FFFF): Reserved */ +/* APB0 */ +#define WDT_BASE (PERIPH_BASE_APB0 + 0x00000) +#define TIMER0_BASE (PERIPH_BASE_APB0 + 0x04000) +#define TIMER1_BASE (PERIPH_BASE_APB0 + 0x08000) +#define UART0_BASE (PERIPH_BASE_APB0 + 0x0c000) +#define UART1_BASE (PERIPH_BASE_APB0 + 0x10000) +/* PERIPH_BASE_APB0 + 0X14000 (0x4001 4000 - 0x4001 7FFF): Reserved */ +#define PWM1_BASE (PERIPH_BASE_APB0 + 0x18000) +#define I2C0_BASE (PERIPH_BASE_APB0 + 0x1c000) +#define SPI_BASE (PERIPH_BASE_APB0 + 0x20000) +#define RTC_BASE (PERIPH_BASE_APB0 + 0x24000) +#define GPIOINTERRPUT_BASE (PERIPH_BASE_APB0 + 0x28000) +#define PINCONNECT_BASE (PERIPH_BASE_APB0 + 0x2c000) +#define SSP1_BASE (PERIPH_BASE_APB0 + 0x30000) +#define ADC_BASE (PERIPH_BASE_APB0 + 0x34000) +#define CANAFRAM_BASE (PERIPH_BASE_APB0 + 0x38000) +#define CANAFREG_BASE (PERIPH_BASE_APB0 + 0x3C000) +#define CANCOMMONREG_BASE (PERIPH_BASE_APB0 + 0x40000) +#define CAN1_BASE (PERIPH_BASE_APB0 + 0x44000) +#define CAN2_BASE (PERIPH_BASE_APB0 + 0x48000) +/* PERIPH_BASE_APB0 + 0X4C000 (0x4004 C000 - 0x4005 BFFF): Reserved */ +#define I2C1_BASE (PERIPH_BASE_APB0 + 0x5C000) +/* PERIPH_BASE_APB0 + 0X60000 (0x6000 0000 - 0x4007 BFFF): Reserved */ /* AHB */ -#define GPIO_PIO0_BASE (PERIPH_BASE_AHB + 0x00000) -#define GPIO_PIO1_BASE (PERIPH_BASE_AHB + 0x10000) -#define GPIO_PIO2_BASE (PERIPH_BASE_AHB + 0x20000) -#define GPIO_PIO3_BASE (PERIPH_BASE_AHB + 0x30000) -/* PERIPH_BASE_AHB + 0x40000 (0x5004 0000 - 0x501F FFFF): Reserved */ +#define GPIO_PIO0_BASE (PERIPH_BASE_AHB + 0x9c000) +#define GPIO_PIO1_BASE (PERIPH_BASE_AHB + 0x9c020) +#define GPIO_PIO2_BASE (PERIPH_BASE_AHB + 0x9c040) +#define GPIO_PIO3_BASE (PERIPH_BASE_AHB + 0x9c060) +#define GPIO_PIO4_BASE (PERIPH_BASE_AHB + 0x9c080) #endif From 82f89c414abdaf2110ea6496aab2d0da7b56f9f7 Mon Sep 17 00:00:00 2001 From: Taylor Vesely Date: Wed, 21 Mar 2012 18:16:16 -0600 Subject: [PATCH 22/29] Started to set up GPIO registers. --- include/libopencm3/lpc17xx/gpio.h | 70 +++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/include/libopencm3/lpc17xx/gpio.h b/include/libopencm3/lpc17xx/gpio.h index e69de29b..d24a9f18 100644 --- a/include/libopencm3/lpc17xx/gpio.h +++ b/include/libopencm3/lpc17xx/gpio.h @@ -0,0 +1,70 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Uwe Hermann + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#ifndef LPC17XX_GPIO_H +#define LPC17XX_GPIO_H + +#include +#include + +/* --- Convenience macros -------------------------------------------------- */ + +/* GPIO port base addresses (for convenience) */ +#define GPIO0 GPIO_PIO0_BASE +#define GPIO1 GPIO_PIO1_BASE +#define GPIO2 GPIO_PIO2_BASE +#define GPIO3 GPIO_PIO3_BASE +#define GPIO4 GPIO_PIO4_BASE + +/* GPIO number definitions (for convenience) */ +#define GPIOPIN0 (1 << 0) + +/* --- GPIO registers ------------------------------------------------------ */ + +/* GPIO data direction register (GPIOn_DIR) */ +#define GPIO_DIR(port) MMIO32(port + 0x00) +#define GPIO0_DIR GPIO_DIR(GPIO0) +#define GPIO1_DIR GPIO_DIR(GPIO1) +#define GPIO2_DIR GPIO_DIR(GPIO2) +#define GPIO3_DIR GPIO_DIR(GPIO3) +#define GPIO4_DIR GPIO_DIR(GPIO4) + +/* GPIO port pin value register (GPIOn_PIN) */ +#define GPIO_PIN(port) MMIO32(port + 0x14) +#define GPIO0_PIN GPIO_PIN(GPIO0) +#define GPIO1_PIN GPIO_PIN(GPIO1) +#define GPIO2_PIN GPIO_PIN(GPIO2) +#define GPIO3_PIN GPIO_PIN(GPIO3) +#define GPIO4_PIN GPIO_PIN(GPIO4) + +/* GPIO port output set register (GPIOn_SET) */ +#define GPIO_SET(port) MMIO32(port + 0x18) +#define GPIO0_SET GPIO_SET(GPIO0) +#define GPIO1_SET GPIO_SET(GPIO1) +#define GPIO2_SET GPIO_SET(GPIO2) +#define GPIO3_SET GPIO_SET(GPIO3) +#define GPIO4_SET GPIO_SET(GPIO4) + +/* GPIO port output clear register (GPIOn_CLR) */ +#define GPIO_CLR(port) MMIO32(port + 0x1C) +#define GPIO0_CLR GPIO_CLR(GPIO0) +#define GPIO1_CLR GPIO_CLR(GPIO1) +#define GPIO2_CLR GPIO_CLR(GPIO2) +#define GPIO3_CLR GPIO_CLR(GPIO3) +#define GPIO4_CLR GPIO_CLR(GPIO4) From 968557dfbb62b5f9647527a5625821c9589312ff Mon Sep 17 00:00:00 2001 From: Taylor Vesely Date: Wed, 21 Mar 2012 18:31:18 -0600 Subject: [PATCH 23/29] Copy-pasted linker script from LPC13xx to LPC17XX. Set up the ram and rom regions for the Blueboard-LPC1768-H. --- .../blueboard-lpc1768-h.ld | 5 +- lib/lpc17xx/libopencm3_lpc17xx.ld | 70 +++++++++++++++++++ 2 files changed, 73 insertions(+), 2 deletions(-) diff --git a/examples/lpc17xx/blueboard-lpc1768-h/blueboard-lpc1768-h.ld b/examples/lpc17xx/blueboard-lpc1768-h/blueboard-lpc1768-h.ld index b8cff56b..e2e480ff 100644 --- a/examples/lpc17xx/blueboard-lpc1768-h/blueboard-lpc1768-h.ld +++ b/examples/lpc17xx/blueboard-lpc1768-h/blueboard-lpc1768-h.ld @@ -1,4 +1,3 @@ - /* * This file is part of the libopencm3 project. * @@ -18,13 +17,15 @@ * along with this library. If not, see . */ -/* Linker script for Blueboard-LPC1768-H (LPC1768, 512K flash, 32K SRAM). */ +/* Linker script for Blueboard-LPC1768-H (LPC1768, 512K flash, 64K SRAM). */ /* Define memory regions. */ MEMORY { rom (rx) : ORIGIN = 0x00000000, LENGTH = 512K ram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K + ram1 (rwx) : ORIGIN = 0x2007C000, LENGTH = 16K + ram2 (rwx) : ORIGIN = 0x20080000, LENGTH = 16K } /* Include the common ld script. */ diff --git a/lib/lpc17xx/libopencm3_lpc17xx.ld b/lib/lpc17xx/libopencm3_lpc17xx.ld index e69de29b..d1157587 100644 --- a/lib/lpc17xx/libopencm3_lpc17xx.ld +++ b/lib/lpc17xx/libopencm3_lpc17xx.ld @@ -0,0 +1,70 @@ + +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +/* Generic linker script for LPC13XX targets using libopencm3. */ + +/* Memory regions must be defined in the ld script which includes this one. */ + +/* Enforce emmition of the vector table. */ +EXTERN (vector_table) + +/* Define sections. */ +SECTIONS +{ + . = ORIGIN(rom); + + .text : { + *(.vectors) /* Vector table */ + *(.text*) /* Program code */ + *(.rodata*) /* Read-only data */ + _etext = .; + } >rom + + . = ORIGIN(ram); + + .data : { + _data = .; + *(.data*) /* Read-write initialized data */ + _edata = .; + } >ram AT >rom + + .bss : { + *(.bss*) /* Read-write zero initialized data */ + *(COMMON) + _ebss = .; + } >ram AT >rom + + /* + * The .eh_frame section appears to be used for C++ exception handling. + * You may need to fix this if you're using C++. + */ + /DISCARD/ : { *(.eh_frame) } + + /* + * Another section used by C++ stuff, appears when using newlib with + * 64bit (long long) printf support - discard it for now. + */ + /DISCARD/ : { *(.ARM.exidx) } + + end = .; +} + +PROVIDE(_stack = ORIGIN(ram) + LENGTH(ram)); + From 9eb77c9fd7f9d44d94c2bcc8deb96a5b3ef8715e Mon Sep 17 00:00:00 2001 From: Taylor Vesely Date: Thu, 22 Mar 2012 07:59:55 -0600 Subject: [PATCH 24/29] Wrote miniblink.c for Blueboard-LPC1768-H, cleaned up gpio.h. --- .../blueboard-lpc1768-h/miniblink/miniblink.c | 45 +++++++++++++++++++ include/libopencm3/lpc17xx/gpio.h | 2 + 2 files changed, 47 insertions(+) diff --git a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c index e69de29b..cfc53a51 100644 --- a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c +++ b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c @@ -0,0 +1,45 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Uwe Hermann + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include + +void gpio_setup(void) +{ + GPIO1_DIR |= (1 << 29); /* Configure P1_29 as output. */ +} + +int main(void) +{ + int i; + + gpio_setup(); + + /* Blink LED0 (P3_0) on the board. */ + while (1) { + /* Manually: */ + GPIO1_SET = (1 << 29); /* LED off */ + for (i = 0; i < 800000; i++) /* Wait a bit. */ + __asm__("nop"); + GPIO1_CLR = (1 << 29); /* LED on */ + for (i = 0; i < 800000; i++) /* Wait a bit. */ + __asm__("nop"); + } + + return 0; +} diff --git a/include/libopencm3/lpc17xx/gpio.h b/include/libopencm3/lpc17xx/gpio.h index d24a9f18..e4bf784e 100644 --- a/include/libopencm3/lpc17xx/gpio.h +++ b/include/libopencm3/lpc17xx/gpio.h @@ -68,3 +68,5 @@ #define GPIO2_CLR GPIO_CLR(GPIO2) #define GPIO3_CLR GPIO_CLR(GPIO3) #define GPIO4_CLR GPIO_CLR(GPIO4) + +#endif From caade9729943db3e5ab228eab33d8175ab680fce Mon Sep 17 00:00:00 2001 From: Taylor Vesely Date: Thu, 22 Mar 2012 12:51:57 -0600 Subject: [PATCH 25/29] Created vector.c by example. Added reset_handler entry to linker script. --- lib/lpc17xx/vector.c | 94 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 94 insertions(+) create mode 100644 lib/lpc17xx/vector.c diff --git a/lib/lpc17xx/vector.c b/lib/lpc17xx/vector.c new file mode 100644 index 00000000..016db7ab --- /dev/null +++ b/lib/lpc17xx/vector.c @@ -0,0 +1,94 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Piotr Esden-Tempski + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#define WEAK __attribute__ ((weak)) + +/* Symbols exported by the linker script(s). */ +extern unsigned _etext, _data, _edata, _ebss, _stack; + +void main(void); +void reset_handler(void); +void blocking_handler(void); +void null_handler(void); + +void WEAK nmi_handler(void); +void WEAK hard_fault_handler(void); +void WEAK mem_manage_handler(void); +void WEAK bus_fault_handler(void); +void WEAK usage_fault_handler(void); +void WEAK sv_call_handler(void); +void WEAK debug_monitor_handler(void); +void WEAK pend_sv_handler(void); +void WEAK sys_tick_handler(void); + +/* TODO: Interrupt handler prototypes */ + +__attribute__ ((section(".vectors"))) +void (*const vector_table[]) (void) = { + (void*)&_stack, /* Addr: 0x0000_0000 */ + reset_handler, /* Addr: 0x0000_0004 */ + nmi_handler, /* Addr: 0x0000_0008 */ + hard_fault_handler, /* Addr: 0x0000_000C */ + mem_manage_handler, /* Addr: 0x0000_0010 */ + bus_fault_handler, /* Addr: 0x0000_0014 */ + usage_fault_handler, /* Addr: 0x0000_0018 */ + 0, 0, 0, 0, /* Reserved Addr: 0x0000_001C - 0x0000_002B */ + sv_call_handler, /* Addr: 0x0000_002C */ + debug_monitor_handler, /* Addr: 0x0000_0030 */ + 0, /* Reserved Addr: 0x0000_00034 */ + pend_sv_handler, /* Addr: 0x0000_0038 */ + sys_tick_handler, /* Addr: 0x0000_003C */ +}; + + +void reset_handler(void) +{ + volatile unsigned *src, *dest; + __asm__("MSR msp, %0" : : "r"(&_stack)); + + for (src = &_etext, dest = &_data; dest < &_edata; src++, dest++) + *dest = *src; + + while (dest < &_ebss) + *dest++ = 0; + + /* Call the application's entry point. */ + main(); +} + +void blocking_handler(void) +{ + while (1) ; +} + +void null_handler(void) +{ + /* Do nothing. */ +} + +#pragma weak nmi_handler = null_handler +#pragma weak hard_fault_handler = blocking_handler +#pragma weak mem_manage_handler = blocking_handler +#pragma weak bus_fault_handler = blocking_handler +#pragma weak usage_fault_handler = blocking_handler +#pragma weak sv_call_handler = null_handler +#pragma weak debug_monitor_handler = null_handler +#pragma weak pend_sv_handler = null_handler +#pragma weak sys_tick_handler = null_handler +/* TODO: Interrupt handler weak aliases */ From fa1c6bc632d1fe9a84a7e38ecb239b5cedc15c15 Mon Sep 17 00:00:00 2001 From: Taylor Vesely Date: Thu, 22 Mar 2012 15:27:51 -0600 Subject: [PATCH 26/29] Successfully compiled and ran miniblink.c for the Blueboard-LPC1768-H. --- lib/lpc17xx/libopencm3_lpc17xx.ld | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lib/lpc17xx/libopencm3_lpc17xx.ld b/lib/lpc17xx/libopencm3_lpc17xx.ld index d1157587..30a2c0fb 100644 --- a/lib/lpc17xx/libopencm3_lpc17xx.ld +++ b/lib/lpc17xx/libopencm3_lpc17xx.ld @@ -25,6 +25,9 @@ /* Enforce emmition of the vector table. */ EXTERN (vector_table) +/* Define the entry point of the output file. */ +ENTRY(reset_handler) + /* Define sections. */ SECTIONS { From bf2b8aad2feff6126085e06c60c8e43842d6da43 Mon Sep 17 00:00:00 2001 From: Taylor Vesely Date: Mon, 26 Mar 2012 16:43:43 -0600 Subject: [PATCH 27/29] Added a bunch of register definitions and gpio_set() to LPC17xx gpio. --- .../blueboard-lpc1768-h/miniblink/miniblink.c | 9 ++- include/libopencm3/lpc17xx/gpio.h | 65 +++++++++++++++++++ lib/lpc17xx/gpio.c | 25 +++++++ 3 files changed, 98 insertions(+), 1 deletion(-) diff --git a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c index cfc53a51..c3515814 100644 --- a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c +++ b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c @@ -33,7 +33,14 @@ int main(void) /* Blink LED0 (P3_0) on the board. */ while (1) { /* Manually: */ - GPIO1_SET = (1 << 29); /* LED off */ + //GPIO1_SET = (1 << 29); /* LED off */ + //for (i = 0; i < 800000; i++) /* Wait a bit. */ + // __asm__("nop"); + //GPIO1_CLR = (1 << 29); /* LED on */ + //for (i = 0; i < 800000; i++) /* Wait a bit. */ + // __asm__("nop"); + + gpio_set(GPIO1, GPIOPIN29); /* LED off */ for (i = 0; i < 800000; i++) /* Wait a bit. */ __asm__("nop"); GPIO1_CLR = (1 << 29); /* LED on */ diff --git a/include/libopencm3/lpc17xx/gpio.h b/include/libopencm3/lpc17xx/gpio.h index e4bf784e..567cd2c9 100644 --- a/include/libopencm3/lpc17xx/gpio.h +++ b/include/libopencm3/lpc17xx/gpio.h @@ -34,6 +34,37 @@ /* GPIO number definitions (for convenience) */ #define GPIOPIN0 (1 << 0) +#define GPIOPIN1 (1 << 1) +#define GPIOPIN2 (1 << 2) +#define GPIOPIN3 (1 << 3) +#define GPIOPIN4 (1 << 4) +#define GPIOPIN5 (1 << 5) +#define GPIOPIN6 (1 << 6) +#define GPIOPIN7 (1 << 7) +#define GPIOPIN8 (1 << 8) +#define GPIOPIN9 (1 << 9) +#define GPIOPIN10 (1 << 10) +#define GPIOPIN11 (1 << 11) +#define GPIOPIN12 (1 << 12) +#define GPIOPIN13 (1 << 13) +#define GPIOPIN14 (1 << 14) +#define GPIOPIN15 (1 << 15) +#define GPIOPIN16 (1 << 16) +#define GPIOPIN17 (1 << 17) +#define GPIOPIN18 (1 << 18) +#define GPIOPIN19 (1 << 19) +#define GPIOPIN20 (1 << 20) +#define GPIOPIN21 (1 << 21) +#define GPIOPIN22 (1 << 22) +#define GPIOPIN23 (1 << 23) +#define GPIOPIN24 (1 << 24) +#define GPIOPIN25 (1 << 25) +#define GPIOPIN26 (1 << 26) +#define GPIOPIN27 (1 << 27) +#define GPIOPIN28 (1 << 28) +#define GPIOPIN29 (1 << 29) +#define GPIOPIN30 (1 << 30) +#define GPIOPIN31 (1 << 31) /* --- GPIO registers ------------------------------------------------------ */ @@ -45,6 +76,14 @@ #define GPIO3_DIR GPIO_DIR(GPIO3) #define GPIO4_DIR GPIO_DIR(GPIO4) +/* GPIO fast mask register (GPIOn_DIR) */ +#define GPIO_MASK(port) MMIO32(port + 0x10) +#define GPIO0_MASK GPIO_MASK(GPIO0) +#define GPIO1_MASK GPIO_MASK(GPIO1) +#define GPIO2_MASK GPIO_MASK(GPIO2) +#define GPIO3_MASK GPIO_MASK(GPIO3) +#define GPIO4_MASK GPIO_MASK(GPIO4) + /* GPIO port pin value register (GPIOn_PIN) */ #define GPIO_PIN(port) MMIO32(port + 0x14) #define GPIO0_PIN GPIO_PIN(GPIO0) @@ -69,4 +108,30 @@ #define GPIO3_CLR GPIO_CLR(GPIO3) #define GPIO4_CLR GPIO_CLR(GPIO4) +/* GPIO interrupt register map */ +/* Interrupt enable rising edge */ +#define GPIO0_IER MMIO32(GPIOINTERRPUT_BASE + 0x90) +#define GPIO2_IER MMIO32(GPIOINTERRPUT_BASE + 0xB0) + +/* Interrupt enable falling edge */ +#define GPIO0_IEF MMIO32(GPIOINTERRPUT_BASE + 0x94) +#define GPIO2_IEF MMIO32(GPIOINTERRPUT_BASE + 0xB4) + +/* Interrupt status rising edge */ +#define GPIO0_ISR MMIO32(GPIOINTERRPUT_BASE + 0x84) +#define GPIO2_ISR MMIO32(GPIOINTERRPUT_BASE + 0xA4) + +/* Interrupt status falling edge */ +#define GPIO0_ISF MMIO32(GPIOINTERRPUT_BASE + 0x88) +#define GPIO2_ISF MMIO32(GPIOINTERRPUT_BASE + 0xA8) + +/* Interrupt clear */ +#define GPIO0_IC MMIO32(GPIOINTERRPUT_BASE + 0x8C) +#define GPIO1_IC MMIO32(GPIOINTERRPUT_BASE + 0xAC) + +/* Overall interrupt status */ +#define GPIO_IS MMIO32(GPIOINTERRPUT_BASE + 0x80) + +void gpio_set(u32 gpioport, u32 gpios); + #endif diff --git a/lib/lpc17xx/gpio.c b/lib/lpc17xx/gpio.c index e69de29b..89130826 100644 --- a/lib/lpc17xx/gpio.c +++ b/lib/lpc17xx/gpio.c @@ -0,0 +1,25 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Uwe Hermann + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include + +void gpio_set(u32 gpioport, u32 gpios) +{ + GPIO_SET(gpioport) = gpios; +} From f7bf15343da05ab725c21819aceeb5e3ba80a2d9 Mon Sep 17 00:00:00 2001 From: Taylor Vesely Date: Tue, 27 Mar 2012 08:55:19 -0600 Subject: [PATCH 28/29] Produced build system for Blueboard-LPC1768-H miniblink. --- Makefile | 2 +- examples/lpc17xx/Makefile.include | 124 ++++++++++++++++++ .../blueboard-lpc1768-h/miniblink/Makefile | 24 ++++ lib/lpc17xx/Makefile | 58 ++++++++ 4 files changed, 207 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 3507791a..56ec68d9 100644 --- a/Makefile +++ b/Makefile @@ -25,7 +25,7 @@ LIBDIR = $(DESTDIR)/$(PREFIX)/lib SHAREDIR = $(DESTDIR)/$(PREFIX)/share/libopencm3/scripts INSTALL = install -TARGETS = stm32/f1 stm32/f2 stm32/f4 lpc13xx lm3s +TARGETS = stm32/f1 stm32/f2 stm32/f4 lpc13xx lpc17xx lm3s # Be silent per default, but 'make V=1' will show all compiler calls. ifneq ($(V),1) diff --git a/examples/lpc17xx/Makefile.include b/examples/lpc17xx/Makefile.include index e69de29b..8d6efe7d 100644 --- a/examples/lpc17xx/Makefile.include +++ b/examples/lpc17xx/Makefile.include @@ -0,0 +1,124 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## Copyright (C) 2010 Piotr Esden-Tempski +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +PREFIX ?= arm-none-eabi +#PREFIX ?= arm-elf +CC = $(PREFIX)-gcc +LD = $(PREFIX)-gcc +OBJCOPY = $(PREFIX)-objcopy +OBJDUMP = $(PREFIX)-objdump +# Uncomment this line if you want to use the installed (not local) library. +# TOOLCHAIN_DIR := $(shell dirname `which $(CC)`)/../$(PREFIX) +TOOLCHAIN_DIR = ../../../.. +CFLAGS += -O0 -g -Wall -Wextra -I$(TOOLCHAIN_DIR)/include -fno-common \ + -mcpu=cortex-m3 -mthumb -MD +LDSCRIPT ?= $(BINARY).ld +LDFLAGS += -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib/lpc17xx \ + -T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections +OBJS += $(BINARY).o + +OOCD ?= openocd +OOCD_INTERFACE ?= flossjtag +OOCD_BOARD ?= olimex_stm32_h103 +# FIXME + +# Be silent per default, but 'make V=1' will show all compiler calls. +ifneq ($(V),1) +Q := @ +NULL := 2>/dev/null +else +LDFLAGS += -Wl,--print-gc-sections +endif + +.SUFFIXES: .elf .bin .hex .srec .list .images +.SECONDEXPANSION: +.SECONDARY: + +all: images + +images: $(BINARY).images +flash: $(BINARY).flash + +%.images: %.bin %.hex %.srec %.list + @#echo "*** $* images generated ***" + +%.bin: %.elf + @#printf " OBJCOPY $(*).bin\n" + $(Q)$(OBJCOPY) -Obinary $(*).elf $(*).bin + +%.hex: %.elf + @#printf " OBJCOPY $(*).hex\n" + $(Q)$(OBJCOPY) -Oihex $(*).elf $(*).hex + +%.srec: %.elf + @#printf " OBJCOPY $(*).srec\n" + $(Q)$(OBJCOPY) -Osrec $(*).elf $(*).srec + +%.list: %.elf + @#printf " OBJDUMP $(*).list\n" + $(Q)$(OBJDUMP) -S $(*).elf > $(*).list + +%.elf: $(OBJS) $(LDSCRIPT) $(TOOLCHAIN_DIR)/lib/lpc17xx/libopencm3_lpc17xx.a + @#printf " LD $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(LD) $(LDFLAGS) -o $(*).elf $(OBJS) -lopencm3_lpc17xx + +%.o: %.c Makefile + @#printf " CC $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(CC) $(CFLAGS) -o $@ -c $< + +clean: + $(Q)rm -f *.o + $(Q)rm -f *.d + $(Q)rm -f *.elf + $(Q)rm -f *.bin + $(Q)rm -f *.hex + $(Q)rm -f *.srec + $(Q)rm -f *.list + +# FIXME: Replace STM32 stuff with proper LPC13XX OpenOCD support later. +ifeq ($(OOCD_SERIAL),) +%.flash: %.hex + @printf " FLASH $<\n" + @# IMPORTANT: Don't use "resume", only "reset" will work correctly! + $(Q)$(OOCD) -f interface/$(OOCD_INTERFACE).cfg \ + -f board/$(OOCD_BOARD).cfg \ + -c "init" -c "reset init" \ + -c "stm32x mass_erase 0" \ + -c "flash write_image $(*).hex" \ + -c "reset" \ + -c "shutdown" $(NULL) +else +%.flash: %.hex + @printf " FLASH $<\n" + @# IMPORTANT: Don't use "resume", only "reset" will work correctly! + $(Q)$(OOCD) -f interface/$(OOCD_INTERFACE).cfg \ + -f board/$(OOCD_BOARD).cfg \ + -c "ft2232_serial $(OOCD_SERIAL)" \ + -c "init" -c "reset init" \ + -c "stm32x mass_erase 0" \ + -c "flash write_image $(*).hex" \ + -c "reset" \ + -c "shutdown" $(NULL) +endif + +.PHONY: images clean + +-include $(OBJS:.o=.d) + diff --git a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/Makefile b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/Makefile index e69de29b..2c8d016e 100644 --- a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/Makefile +++ b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/Makefile @@ -0,0 +1,24 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2010 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +BINARY = miniblink + +LDSCRIPT = ../blueboard-lpc1768-h.ld + +include ../../Makefile.include diff --git a/lib/lpc17xx/Makefile b/lib/lpc17xx/Makefile index e69de29b..c29f690d 100644 --- a/lib/lpc17xx/Makefile +++ b/lib/lpc17xx/Makefile @@ -0,0 +1,58 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +LIBNAME = libopencm3_lpc17xx + +PREFIX ?= arm-none-eabi +#PREFIX ?= arm-elf +CC = $(PREFIX)-gcc +AR = $(PREFIX)-ar +CFLAGS = -O0 -g -Wall -Wextra -I../../include -fno-common \ + -mcpu=cortex-m3 -mthumb -Wstrict-prototypes \ + -ffunction-sections -fdata-sections -MD +# ARFLAGS = rcsv +ARFLAGS = rcs +OBJS = gpio.o vector.o + +# VPATH += ../usb + +# Be silent per default, but 'make V=1' will show all compiler calls. +ifneq ($(V),1) +Q := @ +endif + +all: $(LIBNAME).a + +$(LIBNAME).a: $(OBJS) + @printf " AR $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(AR) $(ARFLAGS) $@ $^ + +%.o: %.c + @printf " CC $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(CC) $(CFLAGS) -o $@ -c $< + +clean: + @printf " CLEAN lib/lpc17xx\n" + $(Q)rm -f *.o *.d + $(Q)rm -f $(LIBNAME).a + +.PHONY: clean + +-include $(OBJS:.o=.d) + From 66c5f91a870105aa1f70388d834fffe1bac9947c Mon Sep 17 00:00:00 2001 From: Taylor Vesely Date: Tue, 27 Mar 2012 16:42:36 -0600 Subject: [PATCH 29/29] Implemented gpio_clear() for LPC17xx. --- .../lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c | 8 ++++---- include/libopencm3/lpc17xx/gpio.h | 1 + lib/lpc17xx/gpio.c | 5 +++++ 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c index c3515814..33d413bc 100644 --- a/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c +++ b/examples/lpc17xx/blueboard-lpc1768-h/miniblink/miniblink.c @@ -33,17 +33,17 @@ int main(void) /* Blink LED0 (P3_0) on the board. */ while (1) { /* Manually: */ - //GPIO1_SET = (1 << 29); /* LED off */ + //GPIO1_SET = (1 << 29); /* LED on */ //for (i = 0; i < 800000; i++) /* Wait a bit. */ // __asm__("nop"); - //GPIO1_CLR = (1 << 29); /* LED on */ + //GPIO1_CLR = (1 << 29); /* LED off */ //for (i = 0; i < 800000; i++) /* Wait a bit. */ // __asm__("nop"); - gpio_set(GPIO1, GPIOPIN29); /* LED off */ + gpio_set(GPIO1, GPIOPIN29); /* LED on */ for (i = 0; i < 800000; i++) /* Wait a bit. */ __asm__("nop"); - GPIO1_CLR = (1 << 29); /* LED on */ + gpio_clear(GPIO1, GPIOPIN29); /* LED off */ for (i = 0; i < 800000; i++) /* Wait a bit. */ __asm__("nop"); } diff --git a/include/libopencm3/lpc17xx/gpio.h b/include/libopencm3/lpc17xx/gpio.h index 567cd2c9..7b07ac53 100644 --- a/include/libopencm3/lpc17xx/gpio.h +++ b/include/libopencm3/lpc17xx/gpio.h @@ -133,5 +133,6 @@ #define GPIO_IS MMIO32(GPIOINTERRPUT_BASE + 0x80) void gpio_set(u32 gpioport, u32 gpios); +void gpio_clear(u32 gpioport, u32 gpios); #endif diff --git a/lib/lpc17xx/gpio.c b/lib/lpc17xx/gpio.c index 89130826..6c44081c 100644 --- a/lib/lpc17xx/gpio.c +++ b/lib/lpc17xx/gpio.c @@ -23,3 +23,8 @@ void gpio_set(u32 gpioport, u32 gpios) { GPIO_SET(gpioport) = gpios; } + +void gpio_clear(u32 gpioport, u32 gpios) +{ + GPIO_CLR(gpioport) = gpios; +}