Adapted to the new header style. Added some defs.
This commit is contained in:
Piotr Esden-Tempski
parent
d173306c31
commit
0c6b661502
@ -90,41 +90,91 @@
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/* --- USART_SR values ----------------------------------------------------- */
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#define USART_SR_CTS (1 << 9) /* N/A on UART4/5 */
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/* CTS: CTS flag */
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/* Note: N/A on UART4/5 */
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#define USART_SR_CTS (1 << 9)
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/* LBD: LIN break detection flag */
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#define USART_SR_LBD (1 << 8)
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/* TXE: Transmit data buffer empty */
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#define USART_SR_TXE (1 << 7)
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/* TC: Transmission complete */
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#define USART_SR_TC (1 << 6)
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/* RXNE: Read data register not empty */
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#define USART_SR_RXNE (1 << 5)
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/* IDLE: Idle line detected */
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#define USART_SR_IDLE (1 << 4)
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/* ORE: Overrun error */
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#define USART_SR_ORE (1 << 3)
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/* NE: Noise error flag */
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#define USART_SR_NE (1 << 2)
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/* FE: Framing error */
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#define USART_SR_FE (1 << 1)
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/* PE: Parity error */
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#define USART_SR_PE (1 << 0)
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/* --- USART_DR values ----------------------------------------------------- */
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/* USART_DR[8:0]: DR[8:0]: Data value */
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#define USART_DR_MASK 0xFF
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/* --- USART_BRR values ---------------------------------------------------- */
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/* USART_BRR[15:4]: DIV_Mantissa[11:0]: mantissa of USARTDIV */
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/* USART_BRR[3:0]: DIV_Fraction[3:0]: fraction of USARTDIV */
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/* DIV_Mantissa[11:0]: mantissa of USARTDIV */
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#define USART_BRR_DIV_MANTISSA_MASK (0xFFF << 4)
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/* DIV_Fraction[3:0]: fraction of USARTDIV */
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#define USART_BRR_DIV_FRACTION_MASK 0xF
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/* --- USART_CR1 values ---------------------------------------------------- */
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/* UE: USART enable */
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#define USART_CR1_UE (1 << 13)
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/* M: Word length */
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#define USART_CR1_M (1 << 12)
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/* WAKE: Wakeup method */
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#define USART_CR1_WAKE (1 << 11)
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/* PCE: Parity control enable */
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#define USART_CR1_PCE (1 << 10)
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/* PS: Parity selection */
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#define USART_CR1_PS (1 << 9)
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/* PEIE: PE interrupt enable */
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#define USART_CR1_PEIE (1 << 8)
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/* TXEIE: TXE interrupt enable */
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#define USART_CR1_TXEIE (1 << 7)
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/* TCIE: Transmission complete interrupt enable */
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#define USART_CR1_TCIE (1 << 6)
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/* RXNEIE: RXNE interrupt enable */
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#define USART_CR1_RXNEIE (1 << 5)
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/* IDLEIE: IDLE interrupt enable */
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#define USART_CR1_IDLEIE (1 << 4)
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/* TE: Transmitter enable */
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#define USART_CR1_TE (1 << 3)
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/* RE: Receiver enable */
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#define USART_CR1_RE (1 << 2)
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/* RWU: Receiver wakeup */
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#define USART_CR1_RWU (1 << 1)
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/* SBK: Send break */
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#define USART_CR1_SBK (1 << 0)
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/* CR1_PCE / CR1_PS combined values */
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@ -139,35 +189,77 @@
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/* --- USART_CR2 values ---------------------------------------------------- */
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#define USART_CR2_LINEN (1 << 14) /* LIN mode enable */
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/* USART_CR2[13:12]: STOP */
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#define USART_CR2_CLKEN (1 << 11) /* Clock enable */
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#define USART_CR2_CPOL (1 << 10) /* Clock polarity */
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#define USART_CR2_CPHA (1 << 9) /* Clock phase */
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#define USART_CR2_LBCL (1 << 8) /* Last bit clock pulse */
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#define USART_CR2_LBDIE (1 << 6) /* LIN break det. int. en. */
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#define USART_CR2_LBDL (1 << 5) /* LIN break det. length */
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/* USART_CR2[3:0]: ADD */
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/* LINEN: LIN mode enable */
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#define USART_CR2_LINEN (1 << 14)
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/* STOP values */
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/* STOP[13:12]: STOP bits */
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#define USART_STOPBITS_1 0x00 /* 1 stop bit */
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#define USART_STOPBITS_0_5 0x01 /* 0.5 stop bits */
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#define USART_STOPBITS_2 0x02 /* 2 stop bits */
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#define USART_STOPBITS_1_5 0x03 /* 1.5 stop bits */
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/* CLKEN: Clock enable */
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#define USART_CR2_CLKEN (1 << 11)
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/* CPOL: Clock polarity */
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#define USART_CR2_CPOL (1 << 10)
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/* CPHA: Clock phase */
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#define USART_CR2_CPHA (1 << 9)
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/* LBCL: Last bit clock pulse */
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#define USART_CR2_LBCL (1 << 8)
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/* LBDIE: LIN break detection interrupt enable */
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#define USART_CR2_LBDIE (1 << 6)
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/* LBDL: LIN break detection length */
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#define USART_CR2_LBDL (1 << 5)
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/* ADD[3:0]: Addres of the usart node */
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#define USART_CR2_ADD_MASK 0xF
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/* --- USART_CR3 values ---------------------------------------------------- */
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#define USART_CR3_CTSIE (1 << 10) /* CTS interrupt enable */
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#define USART_CR3_CTSE (1 << 9) /* CTS enable */
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#define USART_CR3_RTSE (1 << 8) /* RTS enable */
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#define USART_CR3_DMAT (1 << 7) /* DMA enable transmitter */
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#define USART_CR3_DMAR (1 << 6) /* DMA enable receiver */
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#define USART_CR3_SCEN (1 << 5) /* Smartcard mode enable */
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#define USART_CR3_NACK (1 << 4) /* Smartcard NACK enable */
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#define USART_CR3_HDSEL (1 << 3) /* Half-duplex selection */
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#define USART_CR3_IRLP (1 << 2) /* IrDA low-power */
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#define USART_CR3_IREN (1 << 1) /* IrDA mode enable */
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#define USART_CR3_EIE (1 << 0) /* Error interrupt enable */
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/* CTSIE: CTS interrupt enable */
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/* Note: N/A on UART4 & UART5 */
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#define USART_CR3_CTSIE (1 << 10)
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/* CTSE: CTS enable */
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/* Note: N/A on UART4 & UART5 */
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#define USART_CR3_CTSE (1 << 9)
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/* RTSE: RTS enable */
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/* Note: N/A on UART4 & UART5 */
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#define USART_CR3_RTSE (1 << 8)
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/* DMAT: DMA enable transmitter */
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/* Note: N/A on UART5 */
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#define USART_CR3_DMAT (1 << 7)
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/* DMAR: DMA enable receiver */
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/* Note: N/A on UART5 */
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#define USART_CR3_DMAR (1 << 6)
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/* SCEN: Smartcard mode enable */
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/* Note: N/A on UART4 & UART5 */
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#define USART_CR3_SCEN (1 << 5)
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/* NACK: Smartcard NACK enable */
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/* Note: N/A on UART4 & UART5 */
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#define USART_CR3_NACK (1 << 4)
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/* HDSEL: Half-duplex selection */
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#define USART_CR3_HDSEL (1 << 3)
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/* IRLP: IrDA low-power */
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#define USART_CR3_IRLP (1 << 2)
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/* IREN: IrDA mode enable */
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#define USART_CR3_IREN (1 << 1)
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/* EIE: Error interrupt enable */
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#define USART_CR3_EIE (1 << 0)
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/* CR3_CTSE/CR3_RTSE combined values */
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#define USART_FLOWCONTROL_NONE 0x00
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@ -177,10 +269,15 @@
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/* --- USART_GTPR values --------------------------------------------------- */
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/* USART_GTPR[15:8]: GT[7:0]: Guard time value */ /* N/A on UART4/5 */
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/* USART_GTPR[7:0]: PSC[7:0]: Prescaler value */ /* N/A on UART4/5 */
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/* GT[7:0]: Guard time value */
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/* Note: N/A on UART4 & UART5 */
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#define USART_GTPR_GT_MASK (0xFF << 8)
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/* TODO */
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/* PSC[7:0]: Prescaler value */
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/* Note: N/A on UART4/5 */
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#define USART_GTPR_PSC_MASK 0xFF
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/* TODO */ /* Note to Uwe: what needs to be done here? */
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/* --- Function prototypes ------------------------------------------------- */
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@ -195,4 +292,4 @@ void usart_disable(u32 usart);
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void usart_send(u32 usart, u16 data);
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u16 usart_recv(u32 usart);
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#endif
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#endif /* LIBOPENSTM32_USART_H */
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