From 0deb58c73c30e7ab986e285d74edf90627625935 Mon Sep 17 00:00:00 2001 From: Guillaume Revaillot Date: Tue, 3 Apr 2018 18:47:01 +0200 Subject: [PATCH] stm32: fix spi_init_master documentation. Doc mentions SPI_CR_BR_FPCLK_*, but spi_init_master needs offseted register value (SPI_CR_BAUDRATE_FPCLK_*). Align documentation with code. --- lib/stm32/common/spi_common_all.c | 5 ++--- lib/stm32/common/spi_common_f03.c | 5 ++--- lib/stm32/common/spi_common_l1f124.c | 5 ++--- 3 files changed, 6 insertions(+), 9 deletions(-) diff --git a/lib/stm32/common/spi_common_all.c b/lib/stm32/common/spi_common_all.c index 63a46cfb..0da9a440 100644 --- a/lib/stm32/common/spi_common_all.c +++ b/lib/stm32/common/spi_common_all.c @@ -19,9 +19,8 @@ used at the same time on the same peripheral. Example: Clk/4, positive clock polarity, leading edge trigger, 8-bit words, LSB first. @code - spi_init_master(SPI1, SPI_CR1_BR_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE, - SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT, - SPI_CR1_LSBFIRST); + spi_init_master(SPI1, SPI_CR1_BAUDRATE_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE, + SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT, SPI_CR1_LSBFIRST); spi_write(SPI1, 0x55); // 8-bit write spi_write(SPI1, 0xaa88); // 16-bit write reg8 = spi_read(SPI1); // 8-bit read diff --git a/lib/stm32/common/spi_common_f03.c b/lib/stm32/common/spi_common_f03.c index 4558d9ba..965b9480 100644 --- a/lib/stm32/common/spi_common_f03.c +++ b/lib/stm32/common/spi_common_f03.c @@ -19,9 +19,8 @@ used at the same time on the same peripheral. Example: Clk/4, positive clock polarity, leading edge trigger, 8-bit words, LSB first. @code - spi_init_master(SPI1, SPI_CR1_BR_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE, - SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_CRCL_8BIT, - SPI_CR1_LSBFIRST); + spi_init_master(SPI1, SPI_CR1_BAUDRATE_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE, + SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_CRCL_8BIT, SPI_CR1_LSBFIRST); spi_write(SPI1, 0x55); // 8-bit write spi_write(SPI1, 0xaa88); // 16-bit write reg8 = spi_read(SPI1); // 8-bit read diff --git a/lib/stm32/common/spi_common_l1f124.c b/lib/stm32/common/spi_common_l1f124.c index a0fb18af..0dc01eaa 100644 --- a/lib/stm32/common/spi_common_l1f124.c +++ b/lib/stm32/common/spi_common_l1f124.c @@ -19,9 +19,8 @@ used at the same time on the same peripheral. Example: Clk/4, positive clock polarity, leading edge trigger, 8-bit words, LSB first. @code - spi_init_master(SPI1, SPI_CR1_BR_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE, - SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT, - SPI_CR1_LSBFIRST); + spi_init_master(SPI1, SPI_CR1_BAUDRATE_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE, + SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT, SPI_CR1_LSBFIRST); spi_write(SPI1, 0x55); // 8-bit write spi_write(SPI1, 0xaa88); // 16-bit write reg8 = spi_read(SPI1); // 8-bit read