From 12aeaad441a251e91ecb48528c6446a7461b435a Mon Sep 17 00:00:00 2001 From: Frantisek Burian Date: Thu, 13 Feb 2014 18:21:16 +0100 Subject: [PATCH] [locm3] Use the new clock-enabling mechanisms in locm3. --- src/platforms/f4discovery/platform.h | 7 +++---- src/platforms/native/platform.c | 12 ++++++------ src/platforms/native/platform.h | 7 +++---- src/platforms/native/usbdfu.c | 6 +++--- src/platforms/stlink/dfu_upgrade.c | 18 ++++++++---------- src/platforms/stlink/platform.c | 21 ++++++++++----------- src/platforms/stlink/platform.h | 5 ++--- src/platforms/stlink/usbdfu.c | 20 +++++++++----------- src/platforms/stm32/usbuart.c | 2 +- src/platforms/swlink/platform.c | 19 +++++++++---------- src/platforms/swlink/platform.h | 7 +++---- src/platforms/swlink/usbdfu.c | 18 ++++++++---------- 12 files changed, 65 insertions(+), 77 deletions(-) diff --git a/src/platforms/f4discovery/platform.h b/src/platforms/f4discovery/platform.h index 5523b9c2..a777ed20 100644 --- a/src/platforms/f4discovery/platform.h +++ b/src/platforms/f4discovery/platform.h @@ -118,15 +118,14 @@ extern usbd_device *usbdev; #define USBUSART USART3 #define USBUSART_CR1 USART3_CR1 #define USBUSART_IRQ NVIC_USART3_IRQ -#define USBUSART_APB_ENR RCC_APB1ENR -#define USBUSART_CLK_ENABLE RCC_APB1ENR_USART3EN +#define USBUSART_CLK RCC_USART3 #define USBUSART_TX_PORT GPIOD #define USBUSART_TX_PIN GPIO8 #define USBUSART_RX_PORT GPIOD #define USBUSART_RX_PIN GPIO9 #define USBUSART_ISR usart3_isr #define USBUSART_TIM TIM4 -#define USBUSART_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM4EN) +#define USBUSART_TIM_CLK_EN() rcc_periph_clock_enable(RCC_TIM4) #define USBUSART_TIM_IRQ NVIC_TIM4_IRQ #define USBUSART_TIM_ISR tim4_isr @@ -140,7 +139,7 @@ extern usbd_device *usbdev; } while(0) #define TRACE_TIM TIM3 -#define TRACE_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM3EN) +#define TRACE_TIM_CLK_EN() rcc_periph_clock_enable(RCC_TIM3) #define TRACE_IRQ NVIC_TIM3_IRQ #define TRACE_ISR tim3_isr diff --git a/src/platforms/native/platform.c b/src/platforms/native/platform.c index c0ce6583..d6ca9923 100644 --- a/src/platforms/native/platform.c +++ b/src/platforms/native/platform.c @@ -68,11 +68,11 @@ int platform_init(void) rcc_clock_setup_in_hse_8mhz_out_72mhz(); /* Enable peripherals */ - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN); - rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_CRCEN); + rcc_periph_clock_enable(RCC_USB); + rcc_periph_clock_enable(RCC_GPIOA); + rcc_periph_clock_enable(RCC_GPIOB); + rcc_periph_clock_enable(RCC_AFIO); + rcc_periph_clock_enable(RCC_CRC); /* Setup GPIO ports */ gpio_clear(USB_PU_PORT, USB_PU_PIN); @@ -248,7 +248,7 @@ static void morse_update(void) static void adc_init(void) { - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_ADC1EN); + rcc_periph_clock_enable(RCC_ADC1); gpio_set_mode(GPIOB, GPIO_MODE_INPUT, GPIO_CNF_INPUT_ANALOG, GPIO0); diff --git a/src/platforms/native/platform.h b/src/platforms/native/platform.h index a1a28cf6..2916e647 100644 --- a/src/platforms/native/platform.h +++ b/src/platforms/native/platform.h @@ -137,18 +137,17 @@ extern usbd_device *usbdev; #define USBUSART USART1 #define USBUSART_CR1 USART1_CR1 #define USBUSART_IRQ NVIC_USART1_IRQ -#define USBUSART_APB_ENR RCC_APB2ENR -#define USBUSART_CLK_ENABLE RCC_APB2ENR_USART1EN +#define USBUSART_CLK RCC_USART1 #define USBUSART_PORT GPIOA #define USBUSART_TX_PIN GPIO9 #define USBUSART_ISR usart1_isr #define USBUSART_TIM TIM4 -#define USBUSART_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM4EN) +#define USBUSART_TIM_CLK_EN() rcc_periph_clock_enable(RCC_TIM4) #define USBUSART_TIM_IRQ NVIC_TIM4_IRQ #define USBUSART_TIM_ISR tim4_isr #define TRACE_TIM TIM3 -#define TRACE_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM3EN) +#define TRACE_TIM_CLK_EN() rcc_periph_clock_enable(RCC_TIM3) #define TRACE_IRQ NVIC_TIM3_IRQ #define TRACE_ISR tim3_isr diff --git a/src/platforms/native/usbdfu.c b/src/platforms/native/usbdfu.c index e9094a3f..3aac079b 100644 --- a/src/platforms/native/usbdfu.c +++ b/src/platforms/native/usbdfu.c @@ -36,7 +36,7 @@ void dfu_detach(void) int main(void) { /* Check the force bootloader pin*/ - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); + rcc_periph_clock_enable(RCC_GPIOB); if(gpio_get(GPIOB, GPIO12)) dfu_jump_app_if_valid(); @@ -46,8 +46,8 @@ int main(void) systick_set_clocksource(STK_CSR_CLKSOURCE_AHB_DIV8); systick_set_reload(900000); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USBEN); + rcc_periph_clock_enable(RCC_GPIOA); + rcc_periph_clock_enable(RCC_USB); gpio_set_mode(GPIOA, GPIO_MODE_INPUT, 0, GPIO8); systick_interrupt_enable(); diff --git a/src/platforms/stlink/dfu_upgrade.c b/src/platforms/stlink/dfu_upgrade.c index 8d954ca8..b15117b7 100644 --- a/src/platforms/stlink/dfu_upgrade.c +++ b/src/platforms/stlink/dfu_upgrade.c @@ -34,16 +34,15 @@ void dfu_detach(void) { /* Disconnect USB cable by resetting USB Device and pulling USB_DP low*/ - rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); + rcc_periph_reset_pulse(RST_USB); + rcc_periph_clock_enable(RCC_USB); + rcc_periph_clock_enable(RCC_GPIOA); gpio_clear(GPIOA, GPIO12); gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO12); /* Pull PB0 (T_NRST) low */ - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); + rcc_periph_clock_enable(RCC_GPIOB); gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO0); gpio_clear(GPIOB, GPIO0); @@ -59,7 +58,7 @@ void stlink_set_rev(void) * 11 for ST-Link V1, e.g. on VL Discovery, tag as rev 0 * 10 for ST-Link V2, e.g. on F4 Discovery, tag as rev 1 */ - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN); + rcc_periph_clock_enable(RCC_GPIOC); gpio_set_mode(GPIOC, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, GPIO14 | GPIO13); gpio_set(GPIOC, GPIO14 | GPIO13); @@ -93,10 +92,9 @@ int main(void) /* Just in case: Disconnect USB cable by resetting USB Device * and pulling USB_DP low * Device will reconnect automatically as Pull-Up is hard wired*/ - rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); + rcc_periph_reset_pulse(RST_USB); + rcc_periph_clock_enable(RCC_USB); + rcc_periph_clock_enable(RCC_GPIOA); gpio_clear(GPIOA, GPIO12); gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO12); diff --git a/src/platforms/stlink/platform.c b/src/platforms/stlink/platform.c index d7ae41d7..ec8c000d 100644 --- a/src/platforms/stlink/platform.c +++ b/src/platforms/stlink/platform.c @@ -74,12 +74,12 @@ int platform_init(void) rcc_clock_setup_in_hse_8mhz_out_72mhz(); /* Enable peripherals */ - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN); - rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_CRCEN); + rcc_periph_clock_enable(RCC_USB); + rcc_periph_clock_enable(RCC_GPIOA); + rcc_periph_clock_enable(RCC_GPIOB); + rcc_periph_clock_enable(RCC_GPIOC); + rcc_periph_clock_enable(RCC_AFIO); + rcc_periph_clock_enable(RCC_CRC); /* On Rev 1 unconditionally activate MCO on PORTA8 with HSE * platform_hwversion() also needed to initialize led_idle_run! @@ -167,10 +167,9 @@ const char *platform_target_voltage(void) void disconnect_usb(void) { /* Disconnect USB cable by resetting USB Device and pulling USB_DP low*/ - rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); + rcc_periph_reset_pulse(RST_USB); + rcc_periph_clock_enable(RCC_USB); + rcc_periph_clock_enable(RCC_GPIOA); gpio_clear(GPIOA, GPIO12); gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO12); @@ -179,7 +178,7 @@ void disconnect_usb(void) void assert_boot_pin(void) { uint32_t crl = GPIOA_CRL; - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); + rcc_periph_clock_enable(RCC_GPIOA); /* Enable Pull on GPIOA1. We don't rely on the external pin * really pulled, but only on the value of the CNF register * changed from the reset value diff --git a/src/platforms/stlink/platform.h b/src/platforms/stlink/platform.h index ffe9fbf3..6268a0ef 100644 --- a/src/platforms/stlink/platform.h +++ b/src/platforms/stlink/platform.h @@ -123,13 +123,12 @@ extern usbd_device *usbdev; #define USBUSART USART2 #define USBUSART_CR1 USART2_CR1 #define USBUSART_IRQ NVIC_USART2_IRQ -#define USBUSART_APB_ENR RCC_APB1ENR -#define USBUSART_CLK_ENABLE RCC_APB1ENR_USART2EN +#define USBUSART_CLK RCC_USART2 #define USBUSART_PORT GPIOA #define USBUSART_TX_PIN GPIO2 #define USBUSART_ISR usart2_isr #define USBUSART_TIM TIM4 -#define USBUSART_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM4EN) +#define USBUSART_TIM_CLK_EN() rcc_periph_clock_enable(RCC_TIM4) #define USBUSART_TIM_IRQ NVIC_TIM4_IRQ #define USBUSART_TIM_ISR tim4_isr diff --git a/src/platforms/stlink/usbdfu.c b/src/platforms/stlink/usbdfu.c index 3c2b8bef..843033b5 100644 --- a/src/platforms/stlink/usbdfu.c +++ b/src/platforms/stlink/usbdfu.c @@ -47,7 +47,7 @@ static int stlink_test_nrst(void) * 11 for ST-Link V1, e.g. on VL Discovery, tag as rev 0 * 10 for ST-Link V2, e.g. on F4 Discovery, tag as rev 1 */ - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN); + rcc_periph_clock_enable(RCC_GPIOC); gpio_set_mode(GPIOC, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, GPIO14 | GPIO13); gpio_set(GPIOC, GPIO14 | GPIO13); @@ -65,7 +65,7 @@ static int stlink_test_nrst(void) } gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, led_idle_run); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); + rcc_periph_clock_enable(RCC_GPIOB); gpio_set_mode(GPIOB, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, pin); gpio_set(GPIOB, pin); @@ -80,10 +80,9 @@ void dfu_detach(void) { /* Disconnect USB cable by resetting USB Device and pulling USB_DP low*/ - rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); + rcc_periph_reset_pulse(RST_USB); + rcc_periph_clock_enable(RCC_USB); + rcc_periph_clock_enable(RCC_GPIOA); gpio_clear(GPIOA, GPIO12); gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO12); @@ -93,7 +92,7 @@ void dfu_detach(void) int main(void) { /* Check the force bootloader pin*/ - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); + rcc_periph_clock_enable(RCC_GPIOA); /* Check value of GPIOA1 configuration. This pin is unconnected on * STLink V1 and V2. If we have a value other than the reset value (0x4), * we have a warm start and request Bootloader entry @@ -111,10 +110,9 @@ int main(void) /* Just in case: Disconnect USB cable by resetting USB Device * and pulling USB_DP low * Device will reconnect automatically as Pull-Up is hard wired*/ - rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); + rcc_periph_reset_pulse(RST_USB); + rcc_periph_clock_enable(RCC_USB); + rcc_periph_clock_enable(RCC_GPIOA); gpio_clear(GPIOA, GPIO12); gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO12); diff --git a/src/platforms/stm32/usbuart.c b/src/platforms/stm32/usbuart.c index 7f5ebdeb..95371dd7 100644 --- a/src/platforms/stm32/usbuart.c +++ b/src/platforms/stm32/usbuart.c @@ -52,7 +52,7 @@ void usbuart_init(void) return; #endif - rcc_peripheral_enable_clock(&USBUSART_APB_ENR, USBUSART_CLK_ENABLE); + rcc_periph_clock_enable(USBUSART_CLK); UART_PIN_SETUP(); diff --git a/src/platforms/swlink/platform.c b/src/platforms/swlink/platform.c index ea88dcb9..28db60fe 100644 --- a/src/platforms/swlink/platform.c +++ b/src/platforms/swlink/platform.c @@ -47,11 +47,11 @@ int platform_init(void) rcc_clock_setup_in_hse_8mhz_out_72mhz(); /* Enable peripherals */ - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN); - rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_CRCEN); + rcc_periph_clock_enable(RCC_USB); + rcc_periph_clock_enable(RCC_GPIOA); + rcc_periph_clock_enable(RCC_GPIOB); + rcc_periph_clock_enable(RCC_AFIO); + rcc_periph_clock_enable(RCC_CRC); /* Unmap JTAG Pins so we can reuse as GPIO */ data = AFIO_MAPR; @@ -135,10 +135,9 @@ const char *platform_target_voltage(void) void disconnect_usb(void) { /* Disconnect USB cable by resetting USB Device and pulling USB_DP low*/ - rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); + rcc_periph_reset_pulse(RST_USB); + rcc_periph_clock_enable(RCC_USB); + rcc_periph_clock_enable(RCC_GPIOA); gpio_clear(GPIOA, GPIO12); gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO12); @@ -147,7 +146,7 @@ void disconnect_usb(void) void assert_boot_pin(void) { uint32_t crl = GPIOA_CRL; - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); + rcc_periph_clock_enable(RCC_GPIOA); /* Enable Pull on GPIOA1. We don't rely on the external pin * really pulled, but only on the value of the CNF register * changed from the reset value diff --git a/src/platforms/swlink/platform.h b/src/platforms/swlink/platform.h index 90acfb3b..dd2ac8a5 100644 --- a/src/platforms/swlink/platform.h +++ b/src/platforms/swlink/platform.h @@ -115,18 +115,17 @@ extern usbd_device *usbdev; #define USBUSART USART1 #define USBUSART_CR1 USART1_CR1 #define USBUSART_IRQ NVIC_USART1_IRQ -#define USBUSART_APB_ENR RCC_APB2ENR -#define USBUSART_CLK_ENABLE RCC_APB2ENR_USART1EN +#define USBUSART_CLK RCC_USART1 #define USBUSART_PORT GPIOB #define USBUSART_TX_PIN GPIO6 #define USBUSART_ISR usart1_isr #define USBUSART_TIM TIM4 -#define USBUSART_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM4EN) +#define USBUSART_TIM_CLK_EN() rcc_periph_clock_enable(RCC_TIM4) #define USBUSART_TIM_IRQ NVIC_TIM4_IRQ #define USBUSART_TIM_ISR tim4_isr #define TRACE_TIM TIM2 -#define TRACE_TIM_CLK_EN() rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM2EN) +#define TRACE_TIM_CLK_EN() rcc_periph_clock_enable(RCC_TIM2) #define TRACE_IRQ NVIC_TIM2_IRQ #define TRACE_ISR tim2_isr #define TRACE_IC_IN TIM_IC_IN_TI2 diff --git a/src/platforms/swlink/usbdfu.c b/src/platforms/swlink/usbdfu.c index de0b7abc..f87ccf4c 100644 --- a/src/platforms/swlink/usbdfu.c +++ b/src/platforms/swlink/usbdfu.c @@ -31,10 +31,9 @@ void dfu_detach(void) { /* Disconnect USB cable by resetting USB Device and pulling USB_DP low*/ - rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); + rcc_periph_reset_pulse(RST_USB); + rcc_periph_clock_enable(RCC_USB); + rcc_periph_clock_enable(RCC_GPIOA); gpio_clear(GPIOA, GPIO12); gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO12); @@ -45,8 +44,8 @@ int main(void) { /* Check the force bootloader pin*/ uint16_t pin_b; - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); + rcc_periph_clock_enable(RCC_GPIOA); + rcc_periph_clock_enable(RCC_GPIOB); /* Switch PB5 (SWIM_RST_IN) up */ gpio_set(GPIOB, GPIO5); gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ, @@ -70,10 +69,9 @@ int main(void) /* Just in case: Disconnect USB cable by resetting USB Device * and pulling USB_DP low * Device will reconnect automatically as Pull-Up is hard wired*/ - rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USBEN); - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); + rcc_periph_reset_pulse(RST_USB); + rcc_periph_clock_enable(RCC_USB); + rcc_periph_clock_enable(RCC_GPIOA); gpio_clear(GPIOA, GPIO12); gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, GPIO12);