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stm32: timer: fix TIM_CCMR2 definitions

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CC3S and CC4S channel names were badly copy/pasted from CCMR1
This commit is contained in:
Lixing Ding 2017-02-13 18:05:28 +08:00 committed by Karl Palsson
parent ed3cbffc2a
commit 13fe431919
1 changed files with 4 additions and 4 deletions
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8
include/libopencm3/stm32/common/timer_common_all.h
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@ -863,8 +863,8 @@ depending on the level of the complementary input. */
/* Note: CC2S bits are writable only when the channel is OFF (CC2E = 0 in
* TIMx_CCER). */
#define TIM_CCMR2_CC4S_OUT (0x0 << 8)
#define TIM_CCMR2_CC4S_IN_TI2 (0x1 << 8)
#define TIM_CCMR2_CC4S_IN_TI1 (0x2 << 8)
#define TIM_CCMR2_CC4S_IN_TI4 (0x1 << 8)
#define TIM_CCMR2_CC4S_IN_TI3 (0x2 << 8)
#define TIM_CCMR2_CC4S_IN_TRC (0x3 << 8)
#define TIM_CCMR2_CC4S_MASK (0x3 << 8)
@ -892,8 +892,8 @@ depending on the level of the complementary input. */
/* Note: CC2S bits are writable only when the channel is OFF (CC2E = 0 in
* TIMx_CCER). */
#define TIM_CCMR2_CC3S_OUT (0x0 << 0)
#define TIM_CCMR2_CC3S_IN_TI2 (0x1 << 0)
#define TIM_CCMR2_CC3S_IN_TI1 (0x2 << 0)
#define TIM_CCMR2_CC3S_IN_TI3 (0x1 << 0)
#define TIM_CCMR2_CC3S_IN_TI4 (0x2 << 0)
#define TIM_CCMR2_CC3S_IN_TRC (0x3 << 0)
#define TIM_CCMR2_CC3S_MASK (0x3 << 0)