stm32: adc-v2: pull up voltage regulator control.

L4 and F3 actually have the same bits to write in the same order, but F3 hides
the name of the deep power down bit.  Keep the like that for now, but there's a
standard API for enabling and disabling the regulator.
This commit is contained in:
Karl Palsson 2016-03-04 00:28:09 +00:00
parent f40e34680b
commit 1755098617
5 changed files with 70 additions and 3 deletions

View File

@ -172,6 +172,8 @@ specific memorymap.h header before including this header file.*/
BEGIN_DECLS
void adc_set_sample_time(uint32_t adc, uint8_t channel, uint8_t time);
void adc_enable_regulator(uint32_t adc);
void adc_disable_regulator(uint32_t adc);
END_DECLS

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@ -544,8 +544,6 @@ void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger,
bool adc_awd(uint32_t adc);
/*void adc_set_dma_continue(uint32_t adc);*/
/*void adc_set_dma_terminate(uint32_t adc);*/
void adc_enable_regulator(uint32_t adc);
void adc_disable_regulator(uint32_t adc);
END_DECLS

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@ -54,6 +54,15 @@
#define ADC_CHANNEL_VBAT 18
/**@}*/
/* ADC_CR Values ------------------------------------------------------------*/
/* DEEPPWD: Deep power down */
#define ADC_CR_DEEPPWD (1 << 29)
/* ADVREGEN: Voltage regulator enable bit */
#define ADC_CR_ADVREGEN (1 << 28)
/****************************************************************************/
/* ADC_SMPRx ADC Sample Time Selection for Channels */
/** @defgroup adc_sample ADC Sample Time Selection values

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@ -37,7 +37,7 @@ TGT_CFLAGS += $(DEBUG_FLAGS)
ARFLAGS = rcs
# Specific objs
OBJS =
OBJS = adc.o
# common/shared objs
OBJS += rcc_common_all.o

58
lib/stm32/l4/adc.c Normal file
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@ -0,0 +1,58 @@
/** @defgroup adc_file ADC
@ingroup STM32L4xx
@brief <b>libopencm3 STM32L4xx Analog to Digital Converters</b>
@author @htmlonly &copy; @endhtmlonly 2016 Karl Palsson <karlp@tweak.net.au>
LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2016 Karl Palsson <karlp@tweak.net.au>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/stm32/adc.h>
/**@{*/
/**
* Enable the ADC Voltage regulator
* Before any use of the ADC, the ADC Voltage regulator must be enabled.
* You must wait up to 10uSecs afterwards before trying anything else.
* @param[in] adc ADC block register address base
* @sa adc_disable_regulator
*/
void adc_enable_regulator(uint32_t adc)
{
ADC_CR(adc) |= ADC_CR_ADVREGEN;
}
/**
* Disable the ADC Voltage regulator
* You can disable the adc vreg when not in use to save power
* @param[in] adc ADC block register address base
* @sa adc_enable_regulator
*/
void adc_disable_regulator(uint32_t adc)
{
ADC_CR(adc) &= ~ADC_CR_ADVREGEN;
}
/**@}*/