Factor out cm3/common.h and cm3/memorymap.h.
This commit is contained in:
parent
01bfbfed41
commit
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2
HACKING
2
HACKING
@ -34,7 +34,7 @@ Development guidelines
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- All subsystem-specific function names should be prefixed with the
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- All subsystem-specific function names should be prefixed with the
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subsystem name. For example, gpio_set_mode() or rcc_osc_on().
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subsystem name. For example, gpio_set_mode() or rcc_osc_on().
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- Please consistently use the short form types from <libopenstm32/common.h>,
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- Please consistently use the short form types from <cm3/common.h>,
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e.g. u8, u16, u32, and so on.
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e.g. u8, u16, u32, and so on.
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- Variables that are used to store register values read from registers or
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- Variables that are used to store register values read from registers or
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@ -20,7 +20,7 @@
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#ifndef DOGM128_H
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#ifndef DOGM128_H
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#define DOGM128_H
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#define DOGM128_H
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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#include <libopenstm32/gpio.h>
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#include <libopenstm32/gpio.h>
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#include <libopenstm32/spi.h>
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#include <libopenstm32/spi.h>
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@ -17,8 +17,8 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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*/
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#ifndef LIBOPENSTM32_COMMON_H
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#ifndef CM3_COMMON_H
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#define LIBOPENSTM32_COMMON_H
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#define CM3_COMMON_H
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#include <stdint.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdbool.h>
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58
include/cm3/memorymap.h
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58
include/cm3/memorymap.h
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@ -0,0 +1,58 @@
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/*
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* This file is part of the libopenstm32 project.
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*
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* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef CM3_MEMORYMAP_H
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#define CM3_MEMORYMAP_H
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/* --- ARM Cortex-M3 specific definitions ---------------------------------- */
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/* Private peripheral bus - Internal */
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#define PPBI_BASE 0xE0000000
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#define ITM_BASE (PPBI_BASE + 0x0000)
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#define DWT_BASE (PPBI_BASE + 0x1000)
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#define FPB_BASE (PPBI_BASE + 0x2000)
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/* PPBI_BASE + 0x3000 (0xE000 3000 - 0xE000 DFFF): Reserved */
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#define SCS_BASE (PPBI_BASE + 0xE000)
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/* PPBI_BASE + 0xF000 (0xE000 F000 - 0xE003 FFFF): Reserved */
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/* --- ITM: Instrumentation Trace Macrocell --- */
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/* TODO */
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/* --- DWT: Data Watchpoint and Trace unit --- */
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/* TODO */
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/* --- FPB: Flash Patch and Breakpoint unit --- */
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/* TODO */
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/* --- SCS: System Control Space --- */
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/* ITR: Interrupt Type Register */
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#define ITR_BASE (SCS_BASE + 0x0000)
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/* SYS_TICK: System Timer */
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#define SYS_TICK_BASE (SCS_BASE + 0x0010)
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/* NVIC: Nested Vector Interrupt Controller */
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#define NVIC_BASE (SCS_BASE + 0x0100)
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/* SCB: System Control Block */
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#define SCB_BASE (SCS_BASE + 0x0D00)
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/* STE: Software Trigger Interrupt Register */
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#define STIR_BASE (SCS_BASE + 0x0F00)
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/* ID: ID space */
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#define ID_BASE (SCS_BASE + 0x0FD0)
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#endif
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@ -21,7 +21,7 @@
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#define LIBOPENSTM32_LIBOPENSTM32_H
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#define LIBOPENSTM32_LIBOPENSTM32_H
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#include <libopenstm32/tools.h>
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#include <libopenstm32/tools.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/rcc.h>
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#include <libopenstm32/rcc.h>
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#include <libopenstm32/gpio.h>
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#include <libopenstm32/gpio.h>
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@ -21,7 +21,7 @@
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#define LIBOPENSTM32_ADC_H
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#define LIBOPENSTM32_ADC_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- Convenience macros -------------------------------------------------- */
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/* --- Convenience macros -------------------------------------------------- */
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@ -21,7 +21,7 @@
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#define LIBOPENSTM32_BKP_H
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#define LIBOPENSTM32_BKP_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- BKP registers ------------------------------------------------------- */
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/* --- BKP registers ------------------------------------------------------- */
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@ -21,7 +21,7 @@
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#define LIBOPENSTM32_CAN_H
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#define LIBOPENSTM32_CAN_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- Convenience macros -------------------------------------------------- */
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/* --- Convenience macros -------------------------------------------------- */
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@ -21,7 +21,7 @@
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#define LIBOPENSTM32_CRC_H
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#define LIBOPENSTM32_CRC_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- CRC registers ------------------------------------------------------- */
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/* --- CRC registers ------------------------------------------------------- */
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@ -21,7 +21,7 @@
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#define LIBOPENSTM32_DMA_H
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#define LIBOPENSTM32_DMA_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- Convenience macros -------------------------------------------------- */
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/* --- Convenience macros -------------------------------------------------- */
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@ -21,7 +21,7 @@
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#define LIBOPENSTM32_ETHERNET_H
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#define LIBOPENSTM32_ETHERNET_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* Ethernet MAC registers */
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/* Ethernet MAC registers */
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#define ETH_MACCR MMIO32(ETHERNET_BASE + 0x00)
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#define ETH_MACCR MMIO32(ETHERNET_BASE + 0x00)
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@ -21,7 +21,7 @@
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#define LIBOPENSTM32_EXTI_H
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#define LIBOPENSTM32_EXTI_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- EXTI registers ------------------------------------------------------ */
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/* --- EXTI registers ------------------------------------------------------ */
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@ -29,7 +29,7 @@
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#define LIBOPENSTM32_FLASH_H
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#define LIBOPENSTM32_FLASH_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- FLASH registers ----------------------------------------------------- */
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/* --- FLASH registers ----------------------------------------------------- */
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@ -21,7 +21,7 @@
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#define LIBOPENSTM32_GPIO_H
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#define LIBOPENSTM32_GPIO_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- Convenience macros -------------------------------------------------- */
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/* --- Convenience macros -------------------------------------------------- */
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@ -21,7 +21,7 @@
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#define LIBOPENSTM32_I2C_H
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#define LIBOPENSTM32_I2C_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- Convenience macros -------------------------------------------------- */
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/* --- Convenience macros -------------------------------------------------- */
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@ -21,7 +21,7 @@
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#define LIBOPENSTM32_IWDG_H
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#define LIBOPENSTM32_IWDG_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- IWDG registers ------------------------------------------------------ */
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/* --- IWDG registers ------------------------------------------------------ */
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@ -20,40 +20,7 @@
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#ifndef LIBOPENSTM32_MEMORYMAP_H
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#ifndef LIBOPENSTM32_MEMORYMAP_H
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#define LIBOPENSTM32_MEMORYMAP_H
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#define LIBOPENSTM32_MEMORYMAP_H
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/* --- ARM Cortex-M3 specific definitions ---------------------------------- */
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#include <cm3/memorymap.h>
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/* Private peripheral bus - Internal */
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#define PPBI_BASE 0xE0000000
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#define ITM_BASE (PPBI_BASE + 0x0000)
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#define DWT_BASE (PPBI_BASE + 0x1000)
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#define FPB_BASE (PPBI_BASE + 0x2000)
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/* PPBI_BASE + 0x3000 (0xE000 3000 - 0xE000 DFFF): Reserved */
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#define SCS_BASE (PPBI_BASE + 0xE000)
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/* PPBI_BASE + 0xF000 (0xE000 F000 - 0xE003 FFFF): Reserved */
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/* --- ITM: Instrumentation Trace Macrocell --- */
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/* TODO */
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/* --- DWT: Data Watchpoint and Trace unit --- */
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/* TODO */
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/* --- FPB: Flash Patch and Breakpoint unit --- */
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/* TODO */
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/* --- SCS: System Control Space --- */
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/* ITR: Interrupt Type Register */
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#define ITR_BASE (SCS_BASE + 0x0000)
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/* SYS_TICK: System Timer */
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#define SYS_TICK_BASE (SCS_BASE + 0x0010)
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/* NVIC: Nested Vector Interrupt Controller */
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#define NVIC_BASE (SCS_BASE + 0x0100)
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/* SCB: System Control Block */
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#define SCB_BASE (SCS_BASE + 0x0D00)
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/* STE: Software Trigger Interrupt Register */
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#define STIR_BASE (SCS_BASE + 0x0F00)
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/* ID: ID space */
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#define ID_BASE (SCS_BASE + 0x0FD0)
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/* --- STM32 specific peripheral definitions ------------------------------- */
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/* --- STM32 specific peripheral definitions ------------------------------- */
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@ -21,7 +21,7 @@
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#define LIBOPENSTM32_NVIC_H
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#define LIBOPENSTM32_NVIC_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- NVIC Registers ------------------------------------------------------ */
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/* --- NVIC Registers ------------------------------------------------------ */
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#define LIBOPENSTM32_PWR_H
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#define LIBOPENSTM32_PWR_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- PWR registers ------------------------------------------------------- */
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/* --- PWR registers ------------------------------------------------------- */
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#define LIBOPENSTM32_RCC_H
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#define LIBOPENSTM32_RCC_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* Note: Regs/bits marked (**) only exist in "connectivity line" STM32s. */
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/* Note: Regs/bits marked (**) only exist in "connectivity line" STM32s. */
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/* Note: Regs/bits marked (XX) do NOT exist in "connectivity line" STM32s. */
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/* Note: Regs/bits marked (XX) do NOT exist in "connectivity line" STM32s. */
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#define LIBOPENSTM32_RTC_H
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#define LIBOPENSTM32_RTC_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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#include <libopenstm32/pwr.h>
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#include <libopenstm32/pwr.h>
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/* --- RTC registers ------------------------------------------------------- */
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/* --- RTC registers ------------------------------------------------------- */
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#define LIBOPENSTM32_SCB_H
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#define LIBOPENSTM32_SCB_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- SCB: Registers ------------------------------------------------------ */
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/* --- SCB: Registers ------------------------------------------------------ */
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#define LIBOPENSTM32_SPI_H
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#define LIBOPENSTM32_SPI_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* Registers can be accessed as 16bit or 32bit values. */
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/* Registers can be accessed as 16bit or 32bit values. */
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#define LIBOPENSTM32_SYSTICK_H
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#define LIBOPENSTM32_SYSTICK_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- SYSTICK registers --------------------------------------------------- */
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/* --- SYSTICK registers --------------------------------------------------- */
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@ -21,7 +21,7 @@
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#define LIBOPENSTM32_TIMER_H
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#define LIBOPENSTM32_TIMER_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- Convenience macros -------------------------------------------------- */
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/* --- Convenience macros -------------------------------------------------- */
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#define LIBOPENSTM32_USART_H
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#define LIBOPENSTM32_USART_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- Convenience macros -------------------------------------------------- */
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/* --- Convenience macros -------------------------------------------------- */
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#define LIBOPENSTM32_USB_H
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#define LIBOPENSTM32_USB_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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#include <libopenstm32/tools.h>
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#include <libopenstm32/tools.h>
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/* --- USB base addresses -------------------------------------------------- */
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/* --- USB base addresses -------------------------------------------------- */
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#define LIBOPENSTM32_WWDG_H
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#define LIBOPENSTM32_WWDG_H
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/memorymap.h>
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#include <libopenstm32/common.h>
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#include <cm3/common.h>
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/* --- WWDG registers ------------------------------------------------------ */
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/* --- WWDG registers ------------------------------------------------------ */
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#define __USBSTD_H
|
#define __USBSTD_H
|
||||||
|
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
#include <libopenstm32/common.h> /* TODO: Move elsewhere? */
|
#include <cm3/common.h>
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This file contains structure definitions for the USB control structures
|
* This file contains structure definitions for the USB control structures
|
||||||
|
@ -17,7 +17,7 @@
|
|||||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <libopenstm32/common.h>
|
#include <cm3/common.h>
|
||||||
#include <libopenstm32/tools.h>
|
#include <libopenstm32/tools.h>
|
||||||
#include <libopenstm32/usb.h>
|
#include <libopenstm32/usb.h>
|
||||||
#include <usb/usbd.h>
|
#include <usb/usbd.h>
|
||||||
|
Loading…
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Reference in New Issue
Block a user