From 181466549b6c2f878fcd24ee9faad35a8e4a0f1e Mon Sep 17 00:00:00 2001 From: Uwe Bonnes Date: Wed, 27 Oct 2021 01:11:09 +0200 Subject: [PATCH] adiv5: Progressive incrementing TRNCNT for the DHCSR write when trying to halt Workaround for CMSIS-DAP/Bulk debugger orbtrace that returns NO_ACK with high values of TRNCNT. Perhaps only STM32F767 needs write to DHCSR with high occupancy to catch the device in a moment not sleeping. --- src/target/adiv5.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/src/target/adiv5.c b/src/target/adiv5.c index a257175a..403ecc99 100644 --- a/src/target/adiv5.c +++ b/src/target/adiv5.c @@ -329,13 +329,26 @@ static uint32_t cortexm_initial_halt(ADIv5_AP_t *ap) adiv5_ap_write(ap, ADIV5_AP_CSW, ap->csw | ADIV5_AP_CSW_SIZE_WORD); adiv5_dp_low_access(ap->dp, ADIV5_LOW_WRITE, ADIV5_AP_TAR, CORTEXM_DHCSR); } + /* Workaround for CMSIS-DAP Bulk orbtrace + * High values of TRNCNT lead to NO_ACK answer from debugger. + * + * However CMSIS/HID even with highest value has few chances to catch + * a STM32F767 mostly sleeping in WFI! + */ + uint32_t start_time = platform_time_ms(); + int trncnt = 0x80; while (!platform_timeout_is_expired(&to)) { uint32_t dhcsr ; if (use_low_access) { adiv5_dp_low_access(ap->dp, ADIV5_LOW_WRITE, ADIV5_DP_CTRLSTAT, - ctrlstat | (0xfff * ADIV5_DP_CTRLSTAT_TRNCNT)); + ctrlstat | (trncnt * ADIV5_DP_CTRLSTAT_TRNCNT)); adiv5_dp_low_access(ap->dp, ADIV5_LOW_WRITE, ADIV5_AP_DRW, dhcsr_ctl); + if (trncnt < 0xfff) { + trncnt += (platform_time_ms() - start_time) * 8; + } else { + trncnt = 0xfff; + } dhcsr = adiv5_dp_low_access( ap->dp, ADIV5_LOW_READ, ADIV5_AP_DRW, 0); } else {