From 1a398fd74229c903c97e675cc19657caf4f153bd Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Wed, 15 Jul 2015 12:19:39 +0000 Subject: [PATCH] stm32f0: syscfg cfgr1 bit define updates Use _FMP for the bit definitions as per the ref manual. Add missing bits from newer ref manual (RM0091r6) --- include/libopencm3/stm32/f0/syscfg.h | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/include/libopencm3/stm32/f0/syscfg.h b/include/libopencm3/stm32/f0/syscfg.h index 10845437..7e796a05 100644 --- a/include/libopencm3/stm32/f0/syscfg.h +++ b/include/libopencm3/stm32/f0/syscfg.h @@ -64,19 +64,30 @@ #define SYSCFG_CFGR1_MEM_MODE_SYSTEM (1 << SYSCFG_CFGR1_MEM_MODE_SHIFT) #define SYSCFG_CFGR1_MEM_MODE_SRAM (3 << SYSCFG_CFGR1_MEM_MODE_SHIFT) +#define SYSCFG_CFGR1_PA11_PA12_RMP (1 << 4) #define SYSCFG_CFGR1_ADC_DMA_RMP (1 << 8) #define SYSCFG_CFGR1_USART1_TX_DMA_RMP (1 << 9) #define SYSCFG_CFGR1_USART1_RX_DMA_RMP (1 << 10) #define SYSCFG_CFGR1_TIM16_DMA_RMP (1 << 11) #define SYSCFG_CFGR1_TIM17_DMA_RMP (1 << 12) +#define SYSCFG_CFGR1_TIM16_DMA_RMP2 (1 << 13) +#define SYSCFG_CFGR1_TIM17_DMA_RMP2 (1 << 14) -#define SYSCFG_CFGR1_I2C_PB6_FMPLUS (1 << 16) -#define SYSCFG_CFGR1_I2C_PB7_FMPLUS (1 << 17) -#define SYSCFG_CFGR1_I2C_PB8_FMPLUS (1 << 18) -#define SYSCFG_CFGR1_I2C_PB9_FMPLUS (1 << 19) -#define SYSCFG_CFGR1_I2C1_FMPLUS (1 << 20) -#define SYSCFG_CFGR1_I2C_PA9_FMPLUS (1 << 22) -#define SYSCFG_CFGR1_I2C_PA10_FMPLUS (1 << 23) +#define SYSCFG_CFGR1_I2C_PB6_FMP (1 << 16) +#define SYSCFG_CFGR1_I2C_PB7_FMP (1 << 17) +#define SYSCFG_CFGR1_I2C_PB8_FMP (1 << 18) +#define SYSCFG_CFGR1_I2C_PB9_FMP (1 << 19) +#define SYSCFG_CFGR1_I2C1_FMP (1 << 20) +#define SYSCFG_CFGR1_I2C2_FMP (1 << 21) +#define SYSCFG_CFGR1_I2C_PA9_FMP (1 << 22) +#define SYSCFG_CFGR1_I2C_PA10_FMP (1 << 23) +#define SYSCFG_CFGR1_SPI2_DMA_RMP (1 << 24) +#define SYSCFG_CFGR1_USART2_DMA_RMP (1 << 25) +#define SYSCFG_CFGR1_USART3_DMA_RMP (1 << 26) +#define SYSCFG_CFGR1_I2C1_DMA_RMP (1 << 27) +#define SYSCFG_CFGR1_TIM1_DMA_RMP (1 << 28) +#define SYSCFG_CFGR1_TIM2_DMA_RMP (1 << 29) +#define SYSCFG_CFGR1_TIM3_DMA_RMP (1 << 30) /* SYSCFG_EXTICR Values -- --------------------------------------------------*/