Fix more STM32 whitespace issues
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6da485f06d
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@ -26,7 +26,8 @@
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/* --- USB base addresses -------------------------------------------------- */
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/* --- USB base addresses -------------------------------------------------- */
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#define USB_PMA_BASE 0x40006000L /* USB packet buffer memory base addr. */
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/* USB packet buffer memory base addr. */
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#define USB_PMA_BASE 0x40006000L
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/* --- USB general registers ----------------------------------------------- */
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/* --- USB general registers ----------------------------------------------- */
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@ -145,10 +145,4 @@ void flash_program_byte(u32 address, u8 data, u32 program_size);
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void flash_wait_for_last_operation(void);
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void flash_wait_for_last_operation(void);
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void flash_program_option_bytes(u32 data);
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void flash_program_option_bytes(u32 data);
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#if 0
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// TODO: Implement support for option bytes
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void flash_erase_option_bytes(void);
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void flash_program_option_bytes(u32 address, u16 data);
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#endif
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#endif
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#endif
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@ -22,7 +22,6 @@
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#include <libopencm3/stm32/timer.h>
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#include <libopencm3/stm32/timer.h>
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/*
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/*
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* TIM2 and TIM5 are now 32bit and the following registers are now 32-bit wide:
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* TIM2 and TIM5 are now 32bit and the following registers are now 32-bit wide:
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* CNT, ARR, CCR1, CCR2, CCR3, CCR4
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* CNT, ARR, CCR1, CCR2, CCR3, CCR4
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@ -144,10 +144,4 @@ void flash_program_byte(u32 address, u8 data, u32 program_size);
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void flash_wait_for_last_operation(void);
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void flash_wait_for_last_operation(void);
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void flash_program_option_bytes(u32 data);
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void flash_program_option_bytes(u32 data);
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#if 0
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// TODO: Implement support for option bytes
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void flash_erase_option_bytes(void);
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void flash_program_option_bytes(u32 address, u16 data);
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#endif
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#endif
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#endif
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@ -22,7 +22,6 @@
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#include <libopencm3/stm32/timer.h>
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#include <libopencm3/stm32/timer.h>
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/*
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/*
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* TIM2 and TIM5 are now 32bit and the following registers are now 32-bit wide:
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* TIM2 and TIM5 are now 32bit and the following registers are now 32-bit wide:
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* CNT, ARR, CCR1, CCR2, CCR3, CCR4
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* CNT, ARR, CCR1, CCR2, CCR3, CCR4
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@ -36,7 +35,7 @@
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/* --- TIM2_OR values ---------------------------------------------------- */
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/* --- TIM2_OR values ---------------------------------------------------- */
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/* MOE: Main output enable */
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/* MOE: Main output enable */
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#define TIM2_OR_ITR1_RMP_TIM8_TRGOUT (0x0 << 10)
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#define TIM2_OR_ITR1_RMP_TIM8_TRGOU (0x0 << 10)
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#define TIM2_OR_ITR1_RMP_PTP (0x1 << 10)
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#define TIM2_OR_ITR1_RMP_PTP (0x1 << 10)
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#define TIM2_OR_ITR1_RMP_OTG_FS_SOF (0x2 << 10)
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#define TIM2_OR_ITR1_RMP_OTG_FS_SOF (0x2 << 10)
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#define TIM2_OR_ITR1_RMP_OTG_HS_SOF (0x3 << 10)
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#define TIM2_OR_ITR1_RMP_OTG_HS_SOF (0x3 << 10)
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