From 24bef9c49eda109e92e926e065b246a71d454f2d Mon Sep 17 00:00:00 2001 From: rma-x Date: Fri, 3 Jul 2020 14:16:16 +0200 Subject: [PATCH] stm32:adc: Change bitwise AND to logical AND The original bitwise AND was _functionally_ correct because all operands were booleans, but it was very poor at conveying the intent. Fixes #1230 --- lib/stm32/common/adc_common_v1.c | 8 ++++---- lib/stm32/common/adc_common_v2_multi.c | 6 +++--- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/lib/stm32/common/adc_common_v1.c b/lib/stm32/common/adc_common_v1.c index c028f11d..227855d0 100644 --- a/lib/stm32/common/adc_common_v1.c +++ b/lib/stm32/common/adc_common_v1.c @@ -588,16 +588,16 @@ void adc_set_regular_sequence(uint32_t adc, uint8_t length, uint8_t channel[]) if (i <= 6) { first6 |= (channel[i - 1] << ((i - 1) * 5)); } - if ((i > 6) & (i <= 12)) { + if ((i > 6) && (i <= 12)) { second6 |= (channel[i - 1] << ((i - 6 - 1) * 5)); } - if ((i > 12) & (i <= 18)) { + if ((i > 12) && (i <= 18)) { third6 |= (channel[i - 1] << ((i - 12 - 1) * 5)); } - if ((i > 18) & (i <= 24)) { + if ((i > 18) && (i <= 24)) { fourth6 |= (channel[i - 1] << ((i - 18 - 1) * 5)); } - if ((i > 24) & (i <= 28)) { + if ((i > 24) && (i <= 28)) { fifth6 |= (channel[i - 1] << ((i - 24 - 1) * 5)); } } diff --git a/lib/stm32/common/adc_common_v2_multi.c b/lib/stm32/common/adc_common_v2_multi.c index d27bb32e..eb7448e7 100644 --- a/lib/stm32/common/adc_common_v2_multi.c +++ b/lib/stm32/common/adc_common_v2_multi.c @@ -111,13 +111,13 @@ void adc_set_regular_sequence(uint32_t adc, uint8_t length, uint8_t channel[]) if (i <= 4) { reg32_1 |= (channel[i - 1] << (i * 6)); } - if ((i > 4) & (i <= 9)) { + if ((i > 4) && (i <= 9)) { reg32_2 |= (channel[i - 1] << ((i - 4 - 1) * 6)); } - if ((i > 9) & (i <= 14)) { + if ((i > 9) && (i <= 14)) { reg32_3 |= (channel[i - 1] << ((i - 9 - 1) * 6)); } - if ((i > 14) & (i <= 16)) { + if ((i > 14) && (i <= 16)) { reg32_4 |= (channel[i - 1] << ((i - 14 - 1) * 6)); } }