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stm32: iwdg (v2) Update doxygen

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Turn the existing comments into doxygen comments to get more value
This commit is contained in:
Karl Palsson 2018-03-28 13:23:22 +00:00
parent cab07c0703
commit 297a51a27e
2 changed files with 16 additions and 18 deletions
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24
include/libopencm3/stm32/common/iwdg_common_all.h
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@ -36,16 +36,16 @@ specific memorymap.h header before including this header file.*/
/* --- IWDG registers ------------------------------------------------------ */ /* --- IWDG registers ------------------------------------------------------ */
/* Key Register (IWDG_KR) */ /** Key Register (IWDG_KR) */
#define IWDG_KR MMIO32(IWDG_BASE + 0x00) #define IWDG_KR MMIO32(IWDG_BASE + 0x00)
/* Prescaler register (IWDG_PR) */ /** Prescaler register (IWDG_PR) */
#define IWDG_PR MMIO32(IWDG_BASE + 0x04) #define IWDG_PR MMIO32(IWDG_BASE + 0x04)
/* Reload register (IWDG_RLR) */ /** Reload register (IWDG_RLR) */
#define IWDG_RLR MMIO32(IWDG_BASE + 0x08) #define IWDG_RLR MMIO32(IWDG_BASE + 0x08)
/* Status register (IWDG_SR) */ /** Status register (IWDG_SR) */
#define IWDG_SR MMIO32(IWDG_BASE + 0x0c) #define IWDG_SR MMIO32(IWDG_BASE + 0x0c)
/* --- IWDG_KR values ------------------------------------------------------ */ /* --- IWDG_KR values ------------------------------------------------------ */
@ -54,7 +54,7 @@ specific memorymap.h header before including this header file.*/
/* KEY[15:0]: Key value (write-only, reads as 0x0000) */ /* KEY[15:0]: Key value (write-only, reads as 0x0000) */
/** @defgroup iwdg_key IWDG Key Values /** @defgroup iwdg_key IWDG Key Values
@ingroup STM32F_iwdg_defines @ingroup iwdg_defines
@{*/ @{*/
#define IWDG_KR_RESET 0xaaaa #define IWDG_KR_RESET 0xaaaa
@ -69,7 +69,7 @@ specific memorymap.h header before including this header file.*/
/* PR[2:0]: Prescaler divider */ /* PR[2:0]: Prescaler divider */
#define IWDG_PR_LSB 0 #define IWDG_PR_LSB 0
/** @defgroup iwdg_prediv IWDG prescaler divider /** @defgroup iwdg_prediv IWDG prescaler divider
@ingroup STM32F_iwdg_defines @ingroup iwdg_defines
@{*/ @{*/
#define IWDG_PR_DIV4 0x0 #define IWDG_PR_DIV4 0x0
@ -89,15 +89,15 @@ specific memorymap.h header before including this header file.*/
/* RL[11:0]: Watchdog counter reload value */ /* RL[11:0]: Watchdog counter reload value */
/* --- IWDG_SR values ------------------------------------------------------ */ /** @defgroup iwdg_sr_values IWDG Status Register Values
@ingroup iwdg_defines
/* Bits [31:2]: Reserved. */ @{*/
/** RVU: Watchdog counter reload value update */
/* RVU: Watchdog counter reload value update */
#define IWDG_SR_RVU (1 << 1) #define IWDG_SR_RVU (1 << 1)
/* PVU: Watchdog prescaler value update */ /** PVU: Watchdog prescaler value update */
#define IWDG_SR_PVU (1 << 0) #define IWDG_SR_PVU (1 << 0)
/*@}*/
/* --- IWDG function prototypes---------------------------------------------- */ /* --- IWDG function prototypes---------------------------------------------- */

10
include/libopencm3/stm32/common/iwdg_common_v2.h
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@ -44,19 +44,17 @@ specific memorymap.h header before including this header file.*/
/* Register definitions */ /* Register definitions */
/*****************************************************************************/ /*****************************************************************************/
/* Window Register (IWDG_WINR) */ /** Window Register (IWDG_WINR) */
#define IWDG_WINR MMIO32(IWDG_BASE + 0x10) #define IWDG_WINR MMIO32(IWDG_BASE + 0x10)
/*****************************************************************************/ /*****************************************************************************/
/* Register values */ /* Register values */
/*****************************************************************************/ /*****************************************************************************/
/** @{*/
/* --- IWDG_SR values ------------------------------------------------------ */ /** @addtogroup iwdg_sr_values
@{*/
/* WVU: Watchdog counter window value update */ /** WVU: Watchdog counter window value update */
#define IWDG_SR_WVU (1 << 2) #define IWDG_SR_WVU (1 << 2)
/**@}*/ /**@}*/
/*****************************************************************************/ /*****************************************************************************/