stm32: flash: pull set_ws up to common code

All that changes is the size of the field.
This commit is contained in:
Karl Palsson 2018-07-13 23:33:16 +00:00
parent 4840b6bc7e
commit 2bf7eb4a0c
11 changed files with 25 additions and 101 deletions

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@ -43,6 +43,15 @@ void flash_prefetch_enable(void);
void flash_prefetch_disable(void);
/** Set the Number of Wait States.
Used to match the system clock to the FLASH memory access time. See the
programming manual for more information on clock speed ranges. The latency must
be changed to the appropriate value <b>before</b> any increase in clock
speed, or <b>after</b> any decrease in clock speed.
@param[in] ws values from @ref flash_latency.
*/
void flash_set_ws(uint32_t ws);
/** Lock the Flash Program and Erase Controller

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@ -58,7 +58,7 @@
/* --- FLASH_ACR values ---------------------------------------------------- */
#define FLASH_ACR_LATENCY_SHIFT 0
#define FLASH_ACR_LATENCY 7
#define FLASH_ACR_LATENCY_MASK 7
#define FLASH_ACR_PRFTBS (1 << 5)
#define FLASH_ACR_PRFTBE (1 << 4)

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@ -50,6 +50,7 @@
/* --- FLASH_ACR values ---------------------------------------------------- */
#define FLASH_ACR_LATENCY_SHIFT 0
#define FLASH_ACR_LATENCY_MASK 0x0f
#define FLASH_ACR_LATENCY(w) ((w) & FLASH_ACR_LATENCY_MASK)
#define FLASH_ACR_LATENCY_0WS 0x00

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@ -48,6 +48,8 @@
#define FLASH_ACR_RUNPD (1 << 4)
#define FLASH_ACR_SLEEPPD (1 << 3)
#define FLASH_ACR_PRFTEN (1 << 1)
#define FLASH_ACR_LATENCY_SHIFT 0
#define FLASH_ACR_LATENCY_MASK 1
/** @defgroup flash_latency FLASH Wait States
@ingroup flash_defines
@{*/

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@ -80,6 +80,7 @@
#define FLASH_ACR_ARTEN (1 << 9)
#define FLASH_ACR_PRFTEN (1 << 8)
#define FLASH_ACR_LATENCY_SHIFT 0
#define FLASH_ACR_LATENCY_MASK 0x0f
/* --- FLASH_SR values ----------------------------------------------------- */

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@ -33,5 +33,16 @@ void flash_prefetch_disable(void)
FLASH_ACR &= ~FLASH_ACR_PRFTEN;
}
void flash_set_ws(uint32_t ws)
{
uint32_t reg32;
reg32 = FLASH_ACR;
reg32 &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_SHIFT);
reg32 |= (ws << FLASH_ACR_LATENCY_SHIFT);
FLASH_ACR = reg32;
}
/*@}*/

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@ -25,21 +25,6 @@
#include <libopencm3/stm32/flash.h>
/*---------------------------------------------------------------------------*/
/** @brief Set the Number of Wait States
Used to match the system clock to the FLASH memory access time. See the
reference manual for more information on clock speed ranges for each wait state.
The latency must be changed to the appropriate value <b>before</b> any increase
in clock speed, or <b>after</b> any decrease in clock speed.
@param[in] ws values from @ref flash_latency.
*/
void flash_set_ws(uint32_t ws)
{
FLASH_ACR = (FLASH_ACR & ~FLASH_ACR_LATENCY) | ws;
}
/*---------------------------------------------------------------------------*/
/** @brief Unlock the Flash Program and Erase Controller

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@ -26,25 +26,6 @@
#include <libopencm3/stm32/flash.h>
/*---------------------------------------------------------------------------*/
/** @brief Set the Number of Wait States
Used to match the system clock to the FLASH memory access time. See the
programming manual for more information on clock speed ranges. The latency must
be changed to the appropriate value <b>before</b> any increase in clock
speed, or <b>after</b> any decrease in clock speed.
@param[in] ws values from @ref flash_latency.
*/
void flash_set_ws(uint32_t ws)
{
uint32_t reg32;
reg32 = FLASH_ACR & ~(FLASH_ACR_LATENCY_MASK);
reg32 |= ws & FLASH_ACR_LATENCY_MASK;
FLASH_ACR = reg32;
}
/*---------------------------------------------------------------------------*/
/** @brief Clear the Programming Error Status Flag

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@ -29,27 +29,6 @@
#include <libopencm3/stm32/flash.h>
/*---------------------------------------------------------------------------*/
/** @brief Set the Number of Wait States
Used to match the system clock to the FLASH memory access time. See the
programming manual for more information on clock speed and voltage ranges. The
latency must be changed to the appropriate value <b>before</b> any increase in
clock speed, or <b>after</b> any decrease in clock speed. A latency setting of
zero only applies if 64-bit mode is not used.
@param[in] ws values from @ref flash_latency.
*/
void flash_set_ws(uint32_t ws)
{
uint32_t reg32;
reg32 = FLASH_ACR;
reg32 &= ~(1 << 0);
reg32 |= ws;
FLASH_ACR = reg32;
}
/**
* Unlock primary access to the flash control/erase block

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@ -58,32 +58,6 @@ static inline void flash_pipeline_stall(void)
__asm__ volatile("dsb":::"memory");
}
/*---------------------------------------------------------------------------*/
/** @brief Set the Number of Wait States
Used to match the system clock to the FLASH memory access time. See the
programming manual for more information on clock speed ranges. The latency must
be changed to the appropriate value <b>before</b> any increase in clock
speed, or <b>after</b> any decrease in clock speed.
@param[in] ws values from @ref flash_latency.
*/
void flash_set_ws(uint32_t ws)
{
uint32_t reg32;
reg32 = FLASH_ACR;
reg32 &= ~(FLASH_ACR_LATENCY_MASK);
reg32 |= ws;
FLASH_ACR = reg32;
/* Wait until the new wait states take effect.
* RM0385: Check that the new number of wait states is taken into
* account to access the Flash memory by reading the FLASH_ACR register.
*/
while ((FLASH_ACR & FLASH_ACR_LATENCY_MASK) != ws);
}
/*---------------------------------------------------------------------------*/
/** @brief Clear the Programming Error Status Flag

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@ -42,25 +42,6 @@
#include <libopencm3/stm32/flash.h>
/** @brief Set the Number of Wait States
Used to match the system clock to the FLASH memory access time. See the
programming manual for more information on clock speed ranges. The latency must
be changed to the appropriate value <b>before</b> any increase in clock
speed, or <b>after</b> any decrease in clock speed.
@param[in] ws values from @ref flash_latency.
*/
void flash_set_ws(uint32_t ws)
{
uint32_t reg32;
reg32 = FLASH_ACR;
reg32 &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_SHIFT);
reg32 |= (ws << FLASH_ACR_LATENCY_SHIFT);
FLASH_ACR = reg32;
}
/** @brief Clear the Programming Error Status Flag
*/
void flash_clear_pgperr_flag(void)