stm32: flash: pull set_ws up to common code
All that changes is the size of the field.
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@ -43,6 +43,15 @@ void flash_prefetch_enable(void);
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void flash_prefetch_disable(void);
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void flash_prefetch_disable(void);
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/** Set the Number of Wait States.
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Used to match the system clock to the FLASH memory access time. See the
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programming manual for more information on clock speed ranges. The latency must
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be changed to the appropriate value <b>before</b> any increase in clock
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speed, or <b>after</b> any decrease in clock speed.
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@param[in] ws values from @ref flash_latency.
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*/
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void flash_set_ws(uint32_t ws);
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void flash_set_ws(uint32_t ws);
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/** Lock the Flash Program and Erase Controller
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/** Lock the Flash Program and Erase Controller
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@ -58,7 +58,7 @@
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/* --- FLASH_ACR values ---------------------------------------------------- */
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define FLASH_ACR_LATENCY_SHIFT 0
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#define FLASH_ACR_LATENCY_SHIFT 0
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#define FLASH_ACR_LATENCY 7
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#define FLASH_ACR_LATENCY_MASK 7
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#define FLASH_ACR_PRFTBS (1 << 5)
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#define FLASH_ACR_PRFTBS (1 << 5)
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#define FLASH_ACR_PRFTBE (1 << 4)
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#define FLASH_ACR_PRFTBE (1 << 4)
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@ -50,6 +50,7 @@
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/* --- FLASH_ACR values ---------------------------------------------------- */
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define FLASH_ACR_LATENCY_SHIFT 0
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#define FLASH_ACR_LATENCY_MASK 0x0f
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#define FLASH_ACR_LATENCY_MASK 0x0f
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#define FLASH_ACR_LATENCY(w) ((w) & FLASH_ACR_LATENCY_MASK)
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#define FLASH_ACR_LATENCY(w) ((w) & FLASH_ACR_LATENCY_MASK)
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#define FLASH_ACR_LATENCY_0WS 0x00
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#define FLASH_ACR_LATENCY_0WS 0x00
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@ -48,6 +48,8 @@
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#define FLASH_ACR_RUNPD (1 << 4)
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#define FLASH_ACR_RUNPD (1 << 4)
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#define FLASH_ACR_SLEEPPD (1 << 3)
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#define FLASH_ACR_SLEEPPD (1 << 3)
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#define FLASH_ACR_PRFTEN (1 << 1)
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#define FLASH_ACR_PRFTEN (1 << 1)
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#define FLASH_ACR_LATENCY_SHIFT 0
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#define FLASH_ACR_LATENCY_MASK 1
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/** @defgroup flash_latency FLASH Wait States
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/** @defgroup flash_latency FLASH Wait States
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@ingroup flash_defines
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@ingroup flash_defines
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@{*/
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@{*/
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@ -80,6 +80,7 @@
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#define FLASH_ACR_ARTEN (1 << 9)
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#define FLASH_ACR_ARTEN (1 << 9)
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#define FLASH_ACR_PRFTEN (1 << 8)
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#define FLASH_ACR_PRFTEN (1 << 8)
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#define FLASH_ACR_LATENCY_SHIFT 0
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#define FLASH_ACR_LATENCY_MASK 0x0f
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#define FLASH_ACR_LATENCY_MASK 0x0f
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/* --- FLASH_SR values ----------------------------------------------------- */
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/* --- FLASH_SR values ----------------------------------------------------- */
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@ -33,5 +33,16 @@ void flash_prefetch_disable(void)
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FLASH_ACR &= ~FLASH_ACR_PRFTEN;
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FLASH_ACR &= ~FLASH_ACR_PRFTEN;
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}
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}
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void flash_set_ws(uint32_t ws)
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{
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uint32_t reg32;
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reg32 = FLASH_ACR;
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reg32 &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_SHIFT);
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reg32 |= (ws << FLASH_ACR_LATENCY_SHIFT);
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FLASH_ACR = reg32;
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}
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/*@}*/
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/*@}*/
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@ -25,21 +25,6 @@
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#include <libopencm3/stm32/flash.h>
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#include <libopencm3/stm32/flash.h>
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/*---------------------------------------------------------------------------*/
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/** @brief Set the Number of Wait States
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Used to match the system clock to the FLASH memory access time. See the
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reference manual for more information on clock speed ranges for each wait state.
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The latency must be changed to the appropriate value <b>before</b> any increase
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in clock speed, or <b>after</b> any decrease in clock speed.
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@param[in] ws values from @ref flash_latency.
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*/
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void flash_set_ws(uint32_t ws)
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{
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FLASH_ACR = (FLASH_ACR & ~FLASH_ACR_LATENCY) | ws;
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}
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief Unlock the Flash Program and Erase Controller
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/** @brief Unlock the Flash Program and Erase Controller
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@ -26,25 +26,6 @@
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#include <libopencm3/stm32/flash.h>
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#include <libopencm3/stm32/flash.h>
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/*---------------------------------------------------------------------------*/
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/** @brief Set the Number of Wait States
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Used to match the system clock to the FLASH memory access time. See the
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programming manual for more information on clock speed ranges. The latency must
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be changed to the appropriate value <b>before</b> any increase in clock
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speed, or <b>after</b> any decrease in clock speed.
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@param[in] ws values from @ref flash_latency.
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*/
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void flash_set_ws(uint32_t ws)
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{
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uint32_t reg32;
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reg32 = FLASH_ACR & ~(FLASH_ACR_LATENCY_MASK);
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reg32 |= ws & FLASH_ACR_LATENCY_MASK;
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FLASH_ACR = reg32;
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}
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief Clear the Programming Error Status Flag
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/** @brief Clear the Programming Error Status Flag
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@ -29,27 +29,6 @@
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#include <libopencm3/stm32/flash.h>
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#include <libopencm3/stm32/flash.h>
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/*---------------------------------------------------------------------------*/
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/** @brief Set the Number of Wait States
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Used to match the system clock to the FLASH memory access time. See the
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programming manual for more information on clock speed and voltage ranges. The
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latency must be changed to the appropriate value <b>before</b> any increase in
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clock speed, or <b>after</b> any decrease in clock speed. A latency setting of
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zero only applies if 64-bit mode is not used.
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@param[in] ws values from @ref flash_latency.
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*/
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void flash_set_ws(uint32_t ws)
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{
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uint32_t reg32;
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reg32 = FLASH_ACR;
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reg32 &= ~(1 << 0);
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reg32 |= ws;
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FLASH_ACR = reg32;
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}
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/**
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/**
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* Unlock primary access to the flash control/erase block
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* Unlock primary access to the flash control/erase block
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@ -58,32 +58,6 @@ static inline void flash_pipeline_stall(void)
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__asm__ volatile("dsb":::"memory");
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__asm__ volatile("dsb":::"memory");
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}
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Set the Number of Wait States
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Used to match the system clock to the FLASH memory access time. See the
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programming manual for more information on clock speed ranges. The latency must
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be changed to the appropriate value <b>before</b> any increase in clock
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speed, or <b>after</b> any decrease in clock speed.
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@param[in] ws values from @ref flash_latency.
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*/
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void flash_set_ws(uint32_t ws)
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{
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uint32_t reg32;
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reg32 = FLASH_ACR;
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reg32 &= ~(FLASH_ACR_LATENCY_MASK);
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reg32 |= ws;
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FLASH_ACR = reg32;
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/* Wait until the new wait states take effect.
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* RM0385: Check that the new number of wait states is taken into
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* account to access the Flash memory by reading the FLASH_ACR register.
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*/
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while ((FLASH_ACR & FLASH_ACR_LATENCY_MASK) != ws);
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}
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/** @brief Clear the Programming Error Status Flag
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/** @brief Clear the Programming Error Status Flag
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@ -42,25 +42,6 @@
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#include <libopencm3/stm32/flash.h>
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#include <libopencm3/stm32/flash.h>
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/** @brief Set the Number of Wait States
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Used to match the system clock to the FLASH memory access time. See the
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programming manual for more information on clock speed ranges. The latency must
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be changed to the appropriate value <b>before</b> any increase in clock
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speed, or <b>after</b> any decrease in clock speed.
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@param[in] ws values from @ref flash_latency.
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*/
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void flash_set_ws(uint32_t ws)
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{
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uint32_t reg32;
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reg32 = FLASH_ACR;
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reg32 &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_SHIFT);
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reg32 |= (ws << FLASH_ACR_LATENCY_SHIFT);
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FLASH_ACR = reg32;
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}
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/** @brief Clear the Programming Error Status Flag
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/** @brief Clear the Programming Error Status Flag
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*/
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*/
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void flash_clear_pgperr_flag(void)
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void flash_clear_pgperr_flag(void)
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