diff --git a/include/libopencm3/stm32/f0/rcc.h b/include/libopencm3/stm32/f0/rcc.h index f801bcf8..3ce27795 100644 --- a/include/libopencm3/stm32/f0/rcc.h +++ b/include/libopencm3/stm32/f0/rcc.h @@ -501,18 +501,21 @@ void rcc_css_disable(void); void rcc_css_int_clear(void); int rcc_css_int_flag(void); void rcc_set_sysclk_source(enum rcc_osc clk); +void rcc_set_usbclk_source(enum rcc_osc clk); void rcc_set_pll_multiplication_factor(uint32_t mul); void rcc_set_ppre(uint32_t ppre); void rcc_set_hpre(uint32_t hpre); void rcc_set_prediv(uint32_t prediv); void rcc_set_mco(uint32_t mcosrc); enum rcc_osc rcc_system_clock_source(void); +enum rcc_osc rcc_usb_clock_source(void); void rcc_clock_setup_in_hsi_out_8mhz(void); void rcc_clock_setup_in_hsi_out_16mhz(void); void rcc_clock_setup_in_hsi_out_24mhz(void); void rcc_clock_setup_in_hsi_out_32mhz(void); void rcc_clock_setup_in_hsi_out_40mhz(void); void rcc_clock_setup_in_hsi_out_48mhz(void); +void rcc_clock_setup_in_hsi48_out_48mhz(void); END_DECLS diff --git a/lib/stm32/f0/rcc.c b/lib/stm32/f0/rcc.c index b1b55b9a..89d949af 100644 --- a/lib/stm32/f0/rcc.c +++ b/lib/stm32/f0/rcc.c @@ -420,6 +420,29 @@ void rcc_set_sysclk_source(enum rcc_osc clk) } } +/*---------------------------------------------------------------------------*/ +/** @brief RCC Set the Source for the USB Clock. + * + * @param[in] osc enum ::osc_t. Oscillator ID. Only HSI48 or PLL have + * effect. + */ +void rcc_set_usbclk_source(enum rcc_osc clk) +{ + switch (clk) { + case PLL: + RCC_CFGR3 |= RCC_CFGR3_USBSW; + case HSI48: + RCC_CFGR3 &= ~RCC_CFGR3_USBSW; + case HSI: + case HSE: + case LSI: + case LSE: + case HSI14: + /* do nothing */ + break; + } +} + /*---------------------------------------------------------------------------*/ /** @brief RCC Set the PLL Multiplication Factor. * @@ -493,6 +516,17 @@ enum rcc_osc rcc_system_clock_source(void) cm3_assert_not_reached(); } +/*---------------------------------------------------------------------------*/ +/** @brief RCC Get the USB Clock Source. + * + * @returns ::osc_t USB clock source: + */ + +enum rcc_osc rcc_usb_clock_source(void) +{ + return (RCC_CFGR3 & RCC_CFGR3_USBSW) ? PLL : HSI48; +} + void rcc_clock_setup_in_hsi_out_8mhz(void) { rcc_osc_on(HSI); @@ -629,5 +663,20 @@ void rcc_clock_setup_in_hsi_out_48mhz(void) rcc_ahb_frequency = 48000000; } +void rcc_clock_setup_in_hsi48_out_48mhz(void) +{ + rcc_osc_on(HSI48); + rcc_wait_for_osc_ready(HSI48); + + rcc_set_hpre(RCC_CFGR_HPRE_NODIV); + rcc_set_ppre(RCC_CFGR_PPRE_NODIV); + + flash_set_ws(FLASH_ACR_LATENCY_024_048MHZ); + + rcc_set_sysclk_source(HSI48); + + rcc_apb1_frequency = 48000000; + rcc_ahb_frequency = 48000000; +} /**@}*/