v8m: only check relevant bits in DHCSR when polling in cortexm_forced_halt
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@ -269,16 +269,17 @@ static bool cortexm_forced_halt(target *t)
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platform_srst_set_val(false);
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platform_srst_set_val(false);
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uint32_t dhcsr = 0;
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uint32_t dhcsr = 0;
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uint32_t start_time = platform_time_ms();
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uint32_t start_time = platform_time_ms();
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const uint32_t dhcsr_halted_bits = CORTEXM_DHCSR_S_HALT | CORTEXM_DHCSR_S_REGRDY |
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CORTEXM_DHCSR_C_HALT | CORTEXM_DHCSR_C_DEBUGEN;
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/* Try hard to halt the target. STM32F7 in WFI
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/* Try hard to halt the target. STM32F7 in WFI
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needs multiple writes!*/
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needs multiple writes!*/
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while (platform_time_ms() < start_time + cortexm_wait_timeout) {
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while (platform_time_ms() < start_time + cortexm_wait_timeout) {
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dhcsr = target_mem_read32(t, CORTEXM_DHCSR);
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dhcsr = target_mem_read32(t, CORTEXM_DHCSR);
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if (dhcsr == (CORTEXM_DHCSR_S_HALT | CORTEXM_DHCSR_S_REGRDY |
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if ((dhcsr & dhcsr_halted_bits) == dhcsr_halted_bits)
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CORTEXM_DHCSR_C_HALT | CORTEXM_DHCSR_C_DEBUGEN))
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break;
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break;
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target_halt_request(t);
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target_halt_request(t);
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}
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}
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if (dhcsr != 0x00030003)
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if ((dhcsr & dhcsr_halted_bits) != dhcsr_halted_bits)
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return false;
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return false;
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return true;
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return true;
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}
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}
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