Fixed wrong register name in bit defines.
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618912e45f
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3d4e1fa8b8
@ -211,76 +211,76 @@
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/* --- CAN_TSR values ------------------------------------------------------ */
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/* LOW2: Lowest priority flag for mailbox 2 */
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#define CAN_MSR_LOW2 (1 << 31)
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#define CAN_TSR_LOW2 (1 << 31)
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/* LOW1: Lowest priority flag for mailbox 1 */
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#define CAN_MSR_LOW1 (1 << 30)
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#define CAN_TSR_LOW1 (1 << 30)
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/* LOW0: Lowest priority flag for mailbox 0 */
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#define CAN_MSR_LOW0 (1 << 29)
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#define CAN_TSR_LOW0 (1 << 29)
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/* TME2: Transmit mailbox 2 empty */
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#define CAN_MSR_TME2 (1 << 28)
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#define CAN_TSR_TME2 (1 << 28)
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/* TME1: Transmit mailbox 1 empty */
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#define CAN_MSR_TME1 (1 << 27)
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#define CAN_TSR_TME1 (1 << 27)
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/* TME0: Transmit mailbox 0 empty */
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#define CAN_MSR_TME0 (1 << 26)
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#define CAN_TSR_TME0 (1 << 26)
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/* CODE[1:0]: Mailbox code */
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#define CAN_MSR_CODE_MASK (0x3 << 24)
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#define CAN_TSR_CODE_MASK (0x3 << 24)
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/* ABRQ2: Abort request for mailbox 2 */
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#define CAN_MSR_TABRQ2 (1 << 23)
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#define CAN_TSR_TABRQ2 (1 << 23)
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/* 22:20 Reserved, forced by hardware to 0 */
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/* TERR2: Transmission error for mailbox 2 */
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#define CAN_MSR_TERR2 (1 << 19)
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#define CAN_TSR_TERR2 (1 << 19)
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/* ALST2: Arbitration lost for mailbox 2 */
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#define CAN_MSR_ALST2 (1 << 18)
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#define CAN_TSR_ALST2 (1 << 18)
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/* TXOK2: Transmission OK for mailbox 2 */
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#define CAN_MSR_TXOK2 (1 << 17)
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#define CAN_TSR_TXOK2 (1 << 17)
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/* RQCP2: Request completed mailbox 2 */
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#define CAN_MSR_RQCP2 (1 << 16)
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#define CAN_TSR_RQCP2 (1 << 16)
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/* ABRQ1: Abort request for mailbox 1 */
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#define CAN_MSR_ABRQ1 (1 << 15)
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#define CAN_TSR_ABRQ1 (1 << 15)
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/* 14:12 Reserved, forced by hardware to 0 */
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/* TERR1: Transmission error for mailbox 1 */
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#define CAN_MSR_TERR1 (1 << 11)
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#define CAN_TSR_TERR1 (1 << 11)
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/* ALST1: Arbitration lost for mailbox 1 */
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#define CAN_MSR_ALST1 (1 << 10)
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#define CAN_TSR_ALST1 (1 << 10)
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/* TXOK1: Transmission OK for mailbox 1 */
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#define CAN_MSR_TXOK1 (1 << 9)
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#define CAN_TSR_TXOK1 (1 << 9)
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/* RQCP1: Request completed mailbox 1 */
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#define CAN_MSR_RQCP1 (1 << 8)
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#define CAN_TSR_RQCP1 (1 << 8)
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/* ABRQ0: Abort request for mailbox 0 */
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#define CAN_MSR_ABRQ0 (1 << 7)
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#define CAN_TSR_ABRQ0 (1 << 7)
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/* 6:4 Reserved, forced by hardware to 0 */
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/* TERR0: Transmission error for mailbox 0 */
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#define CAN_MSR_TERR0 (1 << 3)
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#define CAN_TSR_TERR0 (1 << 3)
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/* ALST0: Arbitration lost for mailbox 0 */
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#define CAN_MSR_ALST0 (1 << 2)
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#define CAN_TSR_ALST0 (1 << 2)
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/* TXOK0: Transmission OK for mailbox 0 */
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#define CAN_MSR_TXOK0 (1 << 1)
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#define CAN_TSR_TXOK0 (1 << 1)
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/* RQCP0: Request completed mailbox 0 */
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#define CAN_MSR_RQCP0 (1 << 0)
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#define CAN_TSR_RQCP0 (1 << 0)
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/* --- CAN_RF0R values ----------------------------------------------------- */
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