STM32F4: I2C Noise Filter Register
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@ -31,9 +31,33 @@ LGPL License Terms @ref lgpl_license
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#ifndef LIBOPENCM3_I2C_H
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#ifndef LIBOPENCM3_I2C_H
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#define LIBOPENCM3_I2C_H
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#define LIBOPENCM3_I2C_H
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#include <libopencm3/stm32/memorymap.h>
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#include <libopencm3/stm32/common/i2c_common_v1.h>
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#include <libopencm3/stm32/common/i2c_common_v1.h>
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/**@{*/
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/**
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@addtogroup i2c_defines
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@{*/
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/** FLTR register (I2Cx_FLTR) (noise filter) */
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#define I2C_FLTR(i2c_base) MMIO32((i2c_base) + 0x24)
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#define I2C1_FLTR I2C_FLTR(I2C1)
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#define I2C2_FLTR I2C_FLTR(I2C2)
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#define I2C3_FLTR I2C_FLTR(I2C3)
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/**
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* Bits [3:0] DNF - Digital noise filter
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* These bits configure a digital noise filter on SDA and SCL pins.
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* Value sets minimum pulse width needed to trigger i2c operations.
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* 0 disables, 1 - 15 set minimum width to 'n' * TPCLK1
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*/
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#define I2C_FLTR_DNF_MASK 0xF
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#define I2C_FLTR_DNF_SHIFT 0
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/**
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* Bit 4 - Analog Noise filter disable
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* Turns off the built in analog noise filter.
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*/
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#define I2C_FLTR_ANOFF (1<<4)
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/**@}*/
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/**@}*/
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