fixed some column alignment to conform with libopencm3 precedent
This commit is contained in:
Michael Ossmann
parent
a39df46db4
commit
416f633dbb
@ -27,289 +27,289 @@
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/* --- Convenience macros -------------------------------------------------- */
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/* Pin group base addresses */
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#define PIN_GROUP0 (SCU_BASE + 0x000)
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#define PIN_GROUP1 (SCU_BASE + 0x080)
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#define PIN_GROUP2 (SCU_BASE + 0x100)
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#define PIN_GROUP3 (SCU_BASE + 0x180)
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#define PIN_GROUP4 (SCU_BASE + 0x200)
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#define PIN_GROUP5 (SCU_BASE + 0x280)
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#define PIN_GROUP6 (SCU_BASE + 0x300)
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#define PIN_GROUP7 (SCU_BASE + 0x380)
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#define PIN_GROUP8 (SCU_BASE + 0x400)
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#define PIN_GROUP9 (SCU_BASE + 0x480)
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#define PIN_GROUPA (SCU_BASE + 0x500)
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#define PIN_GROUPB (SCU_BASE + 0x580)
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#define PIN_GROUPC (SCU_BASE + 0x600)
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#define PIN_GROUPD (SCU_BASE + 0x680)
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#define PIN_GROUPE (SCU_BASE + 0x700)
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#define PIN_GROUPF (SCU_BASE + 0x780)
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#define PIN_GROUP0 (SCU_BASE + 0x000)
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#define PIN_GROUP1 (SCU_BASE + 0x080)
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#define PIN_GROUP2 (SCU_BASE + 0x100)
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#define PIN_GROUP3 (SCU_BASE + 0x180)
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#define PIN_GROUP4 (SCU_BASE + 0x200)
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#define PIN_GROUP5 (SCU_BASE + 0x280)
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#define PIN_GROUP6 (SCU_BASE + 0x300)
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#define PIN_GROUP7 (SCU_BASE + 0x380)
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#define PIN_GROUP8 (SCU_BASE + 0x400)
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#define PIN_GROUP9 (SCU_BASE + 0x480)
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#define PIN_GROUPA (SCU_BASE + 0x500)
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#define PIN_GROUPB (SCU_BASE + 0x580)
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#define PIN_GROUPC (SCU_BASE + 0x600)
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#define PIN_GROUPD (SCU_BASE + 0x680)
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#define PIN_GROUPE (SCU_BASE + 0x700)
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#define PIN_GROUPF (SCU_BASE + 0x780)
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#define PIN0 0x000
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#define PIN1 0x004
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#define PIN2 0x008
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#define PIN3 0x00C
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#define PIN4 0x010
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#define PIN5 0x014
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#define PIN6 0x018
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#define PIN7 0x01C
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#define PIN8 0x020
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#define PIN9 0x024
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#define PIN10 0x028
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#define PIN11 0x02C
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#define PIN12 0x030
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#define PIN13 0x034
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#define PIN14 0x038
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#define PIN15 0x03C
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#define PIN16 0x040
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#define PIN17 0x044
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#define PIN18 0x048
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#define PIN19 0x04C
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#define PIN20 0x050
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#define PIN0 0x000
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#define PIN1 0x004
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#define PIN2 0x008
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#define PIN3 0x00C
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#define PIN4 0x010
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#define PIN5 0x014
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#define PIN6 0x018
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#define PIN7 0x01C
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#define PIN8 0x020
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#define PIN9 0x024
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#define PIN10 0x028
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#define PIN11 0x02C
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#define PIN12 0x030
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#define PIN13 0x034
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#define PIN14 0x038
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#define PIN15 0x03C
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#define PIN16 0x040
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#define PIN17 0x044
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#define PIN18 0x048
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#define PIN19 0x04C
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#define PIN20 0x050
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/* --- SCU registers ------------------------------------------------------- */
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/* Pin configuration registers */
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#define SCU_SFS(group, pin) MMIO32(group + pin)
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#define SCU_SFS(group, pin) MMIO32(group + pin)
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/* Pins P0_n */
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#define SCU_SFSP0_0 SCU_SFS(PIN_GROUP0, PIN0)
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#define SCU_SFSP0_1 SCU_SFS(PIN_GROUP0, PIN1)
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#define SCU_SFSP0_0 SCU_SFS(PIN_GROUP0, PIN0)
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#define SCU_SFSP0_1 SCU_SFS(PIN_GROUP0, PIN1)
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/* Pins P1_n */
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#define SCU_SFSP1_0 SCU_SFS(PIN_GROUP1, PIN0)
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#define SCU_SFSP1_1 SCU_SFS(PIN_GROUP1, PIN1)
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#define SCU_SFSP1_2 SCU_SFS(PIN_GROUP1, PIN2)
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#define SCU_SFSP1_3 SCU_SFS(PIN_GROUP1, PIN3)
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#define SCU_SFSP1_4 SCU_SFS(PIN_GROUP1, PIN4)
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#define SCU_SFSP1_5 SCU_SFS(PIN_GROUP1, PIN5)
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#define SCU_SFSP1_6 SCU_SFS(PIN_GROUP1, PIN6)
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#define SCU_SFSP1_7 SCU_SFS(PIN_GROUP1, PIN7)
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#define SCU_SFSP1_8 SCU_SFS(PIN_GROUP1, PIN8)
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#define SCU_SFSP1_9 SCU_SFS(PIN_GROUP1, PIN9)
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#define SCU_SFSP1_10 SCU_SFS(PIN_GROUP1, PIN10)
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#define SCU_SFSP1_11 SCU_SFS(PIN_GROUP1, PIN11)
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#define SCU_SFSP1_12 SCU_SFS(PIN_GROUP1, PIN12)
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#define SCU_SFSP1_13 SCU_SFS(PIN_GROUP1, PIN13)
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#define SCU_SFSP1_14 SCU_SFS(PIN_GROUP1, PIN14)
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#define SCU_SFSP1_15 SCU_SFS(PIN_GROUP1, PIN15)
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#define SCU_SFSP1_16 SCU_SFS(PIN_GROUP1, PIN16)
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#define SCU_SFSP1_17 SCU_SFS(PIN_GROUP1, PIN17)
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#define SCU_SFSP1_18 SCU_SFS(PIN_GROUP1, PIN18)
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#define SCU_SFSP1_19 SCU_SFS(PIN_GROUP1, PIN19)
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#define SCU_SFSP1_20 SCU_SFS(PIN_GROUP1, PIN20)
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#define SCU_SFSP1_0 SCU_SFS(PIN_GROUP1, PIN0)
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#define SCU_SFSP1_1 SCU_SFS(PIN_GROUP1, PIN1)
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#define SCU_SFSP1_2 SCU_SFS(PIN_GROUP1, PIN2)
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#define SCU_SFSP1_3 SCU_SFS(PIN_GROUP1, PIN3)
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#define SCU_SFSP1_4 SCU_SFS(PIN_GROUP1, PIN4)
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#define SCU_SFSP1_5 SCU_SFS(PIN_GROUP1, PIN5)
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#define SCU_SFSP1_6 SCU_SFS(PIN_GROUP1, PIN6)
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#define SCU_SFSP1_7 SCU_SFS(PIN_GROUP1, PIN7)
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#define SCU_SFSP1_8 SCU_SFS(PIN_GROUP1, PIN8)
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#define SCU_SFSP1_9 SCU_SFS(PIN_GROUP1, PIN9)
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#define SCU_SFSP1_10 SCU_SFS(PIN_GROUP1, PIN10)
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#define SCU_SFSP1_11 SCU_SFS(PIN_GROUP1, PIN11)
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#define SCU_SFSP1_12 SCU_SFS(PIN_GROUP1, PIN12)
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#define SCU_SFSP1_13 SCU_SFS(PIN_GROUP1, PIN13)
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#define SCU_SFSP1_14 SCU_SFS(PIN_GROUP1, PIN14)
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#define SCU_SFSP1_15 SCU_SFS(PIN_GROUP1, PIN15)
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#define SCU_SFSP1_16 SCU_SFS(PIN_GROUP1, PIN16)
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#define SCU_SFSP1_17 SCU_SFS(PIN_GROUP1, PIN17)
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#define SCU_SFSP1_18 SCU_SFS(PIN_GROUP1, PIN18)
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#define SCU_SFSP1_19 SCU_SFS(PIN_GROUP1, PIN19)
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#define SCU_SFSP1_20 SCU_SFS(PIN_GROUP1, PIN20)
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/* Pins P2_n */
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#define SCU_SFSP2_0 SCU_SFS(PIN_GROUP2, PIN0)
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#define SCU_SFSP2_1 SCU_SFS(PIN_GROUP2, PIN1)
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#define SCU_SFSP2_2 SCU_SFS(PIN_GROUP2, PIN2)
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#define SCU_SFSP2_3 SCU_SFS(PIN_GROUP2, PIN3)
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#define SCU_SFSP2_4 SCU_SFS(PIN_GROUP2, PIN4)
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#define SCU_SFSP2_5 SCU_SFS(PIN_GROUP2, PIN5)
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#define SCU_SFSP2_6 SCU_SFS(PIN_GROUP2, PIN6)
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#define SCU_SFSP2_7 SCU_SFS(PIN_GROUP2, PIN7)
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#define SCU_SFSP2_8 SCU_SFS(PIN_GROUP2, PIN8)
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#define SCU_SFSP2_9 SCU_SFS(PIN_GROUP2, PIN9)
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#define SCU_SFSP2_10 SCU_SFS(PIN_GROUP2, PIN10)
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#define SCU_SFSP2_11 SCU_SFS(PIN_GROUP2, PIN11)
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#define SCU_SFSP2_12 SCU_SFS(PIN_GROUP2, PIN12)
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#define SCU_SFSP2_13 SCU_SFS(PIN_GROUP2, PIN13)
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#define SCU_SFSP2_0 SCU_SFS(PIN_GROUP2, PIN0)
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#define SCU_SFSP2_1 SCU_SFS(PIN_GROUP2, PIN1)
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#define SCU_SFSP2_2 SCU_SFS(PIN_GROUP2, PIN2)
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#define SCU_SFSP2_3 SCU_SFS(PIN_GROUP2, PIN3)
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#define SCU_SFSP2_4 SCU_SFS(PIN_GROUP2, PIN4)
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#define SCU_SFSP2_5 SCU_SFS(PIN_GROUP2, PIN5)
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#define SCU_SFSP2_6 SCU_SFS(PIN_GROUP2, PIN6)
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#define SCU_SFSP2_7 SCU_SFS(PIN_GROUP2, PIN7)
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#define SCU_SFSP2_8 SCU_SFS(PIN_GROUP2, PIN8)
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#define SCU_SFSP2_9 SCU_SFS(PIN_GROUP2, PIN9)
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#define SCU_SFSP2_10 SCU_SFS(PIN_GROUP2, PIN10)
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#define SCU_SFSP2_11 SCU_SFS(PIN_GROUP2, PIN11)
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#define SCU_SFSP2_12 SCU_SFS(PIN_GROUP2, PIN12)
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#define SCU_SFSP2_13 SCU_SFS(PIN_GROUP2, PIN13)
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/* Pins P3_n */
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#define SCU_SFSP3_0 SCU_SFS(PIN_GROUP3, PIN0)
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#define SCU_SFSP3_1 SCU_SFS(PIN_GROUP3, PIN1)
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#define SCU_SFSP3_2 SCU_SFS(PIN_GROUP3, PIN2)
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#define SCU_SFSP3_3 SCU_SFS(PIN_GROUP3, PIN3)
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#define SCU_SFSP3_4 SCU_SFS(PIN_GROUP3, PIN4)
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#define SCU_SFSP3_5 SCU_SFS(PIN_GROUP3, PIN5)
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#define SCU_SFSP3_6 SCU_SFS(PIN_GROUP3, PIN6)
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#define SCU_SFSP3_7 SCU_SFS(PIN_GROUP3, PIN7)
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#define SCU_SFSP3_8 SCU_SFS(PIN_GROUP3, PIN8)
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#define SCU_SFSP3_0 SCU_SFS(PIN_GROUP3, PIN0)
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#define SCU_SFSP3_1 SCU_SFS(PIN_GROUP3, PIN1)
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#define SCU_SFSP3_2 SCU_SFS(PIN_GROUP3, PIN2)
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#define SCU_SFSP3_3 SCU_SFS(PIN_GROUP3, PIN3)
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#define SCU_SFSP3_4 SCU_SFS(PIN_GROUP3, PIN4)
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#define SCU_SFSP3_5 SCU_SFS(PIN_GROUP3, PIN5)
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#define SCU_SFSP3_6 SCU_SFS(PIN_GROUP3, PIN6)
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#define SCU_SFSP3_7 SCU_SFS(PIN_GROUP3, PIN7)
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#define SCU_SFSP3_8 SCU_SFS(PIN_GROUP3, PIN8)
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/* Pins P4_n */
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#define SCU_SFSP4_0 SCU_SFS(PIN_GROUP4, PIN0)
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#define SCU_SFSP4_1 SCU_SFS(PIN_GROUP4, PIN1)
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#define SCU_SFSP4_2 SCU_SFS(PIN_GROUP4, PIN2)
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#define SCU_SFSP4_3 SCU_SFS(PIN_GROUP4, PIN3)
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#define SCU_SFSP4_4 SCU_SFS(PIN_GROUP4, PIN4)
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#define SCU_SFSP4_5 SCU_SFS(PIN_GROUP4, PIN5)
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#define SCU_SFSP4_6 SCU_SFS(PIN_GROUP4, PIN6)
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#define SCU_SFSP4_7 SCU_SFS(PIN_GROUP4, PIN7)
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#define SCU_SFSP4_8 SCU_SFS(PIN_GROUP4, PIN8)
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#define SCU_SFSP4_9 SCU_SFS(PIN_GROUP4, PIN9)
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#define SCU_SFSP4_10 SCU_SFS(PIN_GROUP4, PIN10)
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#define SCU_SFSP4_0 SCU_SFS(PIN_GROUP4, PIN0)
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#define SCU_SFSP4_1 SCU_SFS(PIN_GROUP4, PIN1)
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#define SCU_SFSP4_2 SCU_SFS(PIN_GROUP4, PIN2)
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#define SCU_SFSP4_3 SCU_SFS(PIN_GROUP4, PIN3)
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#define SCU_SFSP4_4 SCU_SFS(PIN_GROUP4, PIN4)
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#define SCU_SFSP4_5 SCU_SFS(PIN_GROUP4, PIN5)
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#define SCU_SFSP4_6 SCU_SFS(PIN_GROUP4, PIN6)
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#define SCU_SFSP4_7 SCU_SFS(PIN_GROUP4, PIN7)
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#define SCU_SFSP4_8 SCU_SFS(PIN_GROUP4, PIN8)
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#define SCU_SFSP4_9 SCU_SFS(PIN_GROUP4, PIN9)
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#define SCU_SFSP4_10 SCU_SFS(PIN_GROUP4, PIN10)
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/* Pins P5_n */
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#define SCU_SFSP5_0 SCU_SFS(PIN_GROUP5, PIN0)
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#define SCU_SFSP5_1 SCU_SFS(PIN_GROUP5, PIN1)
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#define SCU_SFSP5_2 SCU_SFS(PIN_GROUP5, PIN2)
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#define SCU_SFSP5_3 SCU_SFS(PIN_GROUP5, PIN3)
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#define SCU_SFSP5_4 SCU_SFS(PIN_GROUP5, PIN4)
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#define SCU_SFSP5_5 SCU_SFS(PIN_GROUP5, PIN5)
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#define SCU_SFSP5_6 SCU_SFS(PIN_GROUP5, PIN6)
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#define SCU_SFSP5_7 SCU_SFS(PIN_GROUP5, PIN7)
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#define SCU_SFSP5_0 SCU_SFS(PIN_GROUP5, PIN0)
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#define SCU_SFSP5_1 SCU_SFS(PIN_GROUP5, PIN1)
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#define SCU_SFSP5_2 SCU_SFS(PIN_GROUP5, PIN2)
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#define SCU_SFSP5_3 SCU_SFS(PIN_GROUP5, PIN3)
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#define SCU_SFSP5_4 SCU_SFS(PIN_GROUP5, PIN4)
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#define SCU_SFSP5_5 SCU_SFS(PIN_GROUP5, PIN5)
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#define SCU_SFSP5_6 SCU_SFS(PIN_GROUP5, PIN6)
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#define SCU_SFSP5_7 SCU_SFS(PIN_GROUP5, PIN7)
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/* Pins P6_n */
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#define SCU_SFSP6_0 SCU_SFS(PIN_GROUP6, PIN0)
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#define SCU_SFSP6_1 SCU_SFS(PIN_GROUP6, PIN1)
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#define SCU_SFSP6_2 SCU_SFS(PIN_GROUP6, PIN2)
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#define SCU_SFSP6_3 SCU_SFS(PIN_GROUP6, PIN3)
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#define SCU_SFSP6_4 SCU_SFS(PIN_GROUP6, PIN4)
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#define SCU_SFSP6_5 SCU_SFS(PIN_GROUP6, PIN5)
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#define SCU_SFSP6_6 SCU_SFS(PIN_GROUP6, PIN6)
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#define SCU_SFSP6_7 SCU_SFS(PIN_GROUP6, PIN7)
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#define SCU_SFSP6_8 SCU_SFS(PIN_GROUP6, PIN8)
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#define SCU_SFSP6_9 SCU_SFS(PIN_GROUP6, PIN9)
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#define SCU_SFSP6_10 SCU_SFS(PIN_GROUP6, PIN10)
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#define SCU_SFSP6_11 SCU_SFS(PIN_GROUP6, PIN11)
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#define SCU_SFSP6_12 SCU_SFS(PIN_GROUP6, PIN12)
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#define SCU_SFSP6_0 SCU_SFS(PIN_GROUP6, PIN0)
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#define SCU_SFSP6_1 SCU_SFS(PIN_GROUP6, PIN1)
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#define SCU_SFSP6_2 SCU_SFS(PIN_GROUP6, PIN2)
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#define SCU_SFSP6_3 SCU_SFS(PIN_GROUP6, PIN3)
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#define SCU_SFSP6_4 SCU_SFS(PIN_GROUP6, PIN4)
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#define SCU_SFSP6_5 SCU_SFS(PIN_GROUP6, PIN5)
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#define SCU_SFSP6_6 SCU_SFS(PIN_GROUP6, PIN6)
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#define SCU_SFSP6_7 SCU_SFS(PIN_GROUP6, PIN7)
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#define SCU_SFSP6_8 SCU_SFS(PIN_GROUP6, PIN8)
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#define SCU_SFSP6_9 SCU_SFS(PIN_GROUP6, PIN9)
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#define SCU_SFSP6_10 SCU_SFS(PIN_GROUP6, PIN10)
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#define SCU_SFSP6_11 SCU_SFS(PIN_GROUP6, PIN11)
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#define SCU_SFSP6_12 SCU_SFS(PIN_GROUP6, PIN12)
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/* Pins P7_n */
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#define SCU_SFSP7_0 SCU_SFS(PIN_GROUP7, PIN0)
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#define SCU_SFSP7_1 SCU_SFS(PIN_GROUP7, PIN1)
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#define SCU_SFSP7_2 SCU_SFS(PIN_GROUP7, PIN2)
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#define SCU_SFSP7_3 SCU_SFS(PIN_GROUP7, PIN3)
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#define SCU_SFSP7_4 SCU_SFS(PIN_GROUP7, PIN4)
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#define SCU_SFSP7_5 SCU_SFS(PIN_GROUP7, PIN5)
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#define SCU_SFSP7_6 SCU_SFS(PIN_GROUP7, PIN6)
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#define SCU_SFSP7_7 SCU_SFS(PIN_GROUP7, PIN7)
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#define SCU_SFSP7_0 SCU_SFS(PIN_GROUP7, PIN0)
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#define SCU_SFSP7_1 SCU_SFS(PIN_GROUP7, PIN1)
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#define SCU_SFSP7_2 SCU_SFS(PIN_GROUP7, PIN2)
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#define SCU_SFSP7_3 SCU_SFS(PIN_GROUP7, PIN3)
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#define SCU_SFSP7_4 SCU_SFS(PIN_GROUP7, PIN4)
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#define SCU_SFSP7_5 SCU_SFS(PIN_GROUP7, PIN5)
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#define SCU_SFSP7_6 SCU_SFS(PIN_GROUP7, PIN6)
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#define SCU_SFSP7_7 SCU_SFS(PIN_GROUP7, PIN7)
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/* Pins P8_n */
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#define SCU_SFSP8_0 SCU_SFS(PIN_GROUP8, PIN0)
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#define SCU_SFSP8_1 SCU_SFS(PIN_GROUP8, PIN1)
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#define SCU_SFSP8_2 SCU_SFS(PIN_GROUP8, PIN2)
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#define SCU_SFSP8_3 SCU_SFS(PIN_GROUP8, PIN3)
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#define SCU_SFSP8_4 SCU_SFS(PIN_GROUP8, PIN4)
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#define SCU_SFSP8_5 SCU_SFS(PIN_GROUP8, PIN5)
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#define SCU_SFSP8_6 SCU_SFS(PIN_GROUP8, PIN6)
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#define SCU_SFSP8_7 SCU_SFS(PIN_GROUP8, PIN7)
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#define SCU_SFSP8_8 SCU_SFS(PIN_GROUP8, PIN8)
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#define SCU_SFSP8_0 SCU_SFS(PIN_GROUP8, PIN0)
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#define SCU_SFSP8_1 SCU_SFS(PIN_GROUP8, PIN1)
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#define SCU_SFSP8_2 SCU_SFS(PIN_GROUP8, PIN2)
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#define SCU_SFSP8_3 SCU_SFS(PIN_GROUP8, PIN3)
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#define SCU_SFSP8_4 SCU_SFS(PIN_GROUP8, PIN4)
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#define SCU_SFSP8_5 SCU_SFS(PIN_GROUP8, PIN5)
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#define SCU_SFSP8_6 SCU_SFS(PIN_GROUP8, PIN6)
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#define SCU_SFSP8_7 SCU_SFS(PIN_GROUP8, PIN7)
|
||||
#define SCU_SFSP8_8 SCU_SFS(PIN_GROUP8, PIN8)
|
||||
|
||||
/* Pins P9_n */
|
||||
#define SCU_SFSP9_0 SCU_SFS(PIN_GROUP9, PIN0)
|
||||
#define SCU_SFSP9_1 SCU_SFS(PIN_GROUP9, PIN1)
|
||||
#define SCU_SFSP9_2 SCU_SFS(PIN_GROUP9, PIN2)
|
||||
#define SCU_SFSP9_3 SCU_SFS(PIN_GROUP9, PIN3)
|
||||
#define SCU_SFSP9_4 SCU_SFS(PIN_GROUP9, PIN4)
|
||||
#define SCU_SFSP9_5 SCU_SFS(PIN_GROUP9, PIN5)
|
||||
#define SCU_SFSP9_6 SCU_SFS(PIN_GROUP9, PIN6)
|
||||
#define SCU_SFSP9_0 SCU_SFS(PIN_GROUP9, PIN0)
|
||||
#define SCU_SFSP9_1 SCU_SFS(PIN_GROUP9, PIN1)
|
||||
#define SCU_SFSP9_2 SCU_SFS(PIN_GROUP9, PIN2)
|
||||
#define SCU_SFSP9_3 SCU_SFS(PIN_GROUP9, PIN3)
|
||||
#define SCU_SFSP9_4 SCU_SFS(PIN_GROUP9, PIN4)
|
||||
#define SCU_SFSP9_5 SCU_SFS(PIN_GROUP9, PIN5)
|
||||
#define SCU_SFSP9_6 SCU_SFS(PIN_GROUP9, PIN6)
|
||||
|
||||
/* Pins PA_n */
|
||||
#define SCU_SFSPA_0 SCU_SFS(PIN_GROUPA, PIN0)
|
||||
#define SCU_SFSPA_1 SCU_SFS(PIN_GROUPA, PIN1)
|
||||
#define SCU_SFSPA_2 SCU_SFS(PIN_GROUPA, PIN2)
|
||||
#define SCU_SFSPA_3 SCU_SFS(PIN_GROUPA, PIN3)
|
||||
#define SCU_SFSPA_4 SCU_SFS(PIN_GROUPA, PIN4)
|
||||
#define SCU_SFSPA_0 SCU_SFS(PIN_GROUPA, PIN0)
|
||||
#define SCU_SFSPA_1 SCU_SFS(PIN_GROUPA, PIN1)
|
||||
#define SCU_SFSPA_2 SCU_SFS(PIN_GROUPA, PIN2)
|
||||
#define SCU_SFSPA_3 SCU_SFS(PIN_GROUPA, PIN3)
|
||||
#define SCU_SFSPA_4 SCU_SFS(PIN_GROUPA, PIN4)
|
||||
|
||||
/* Pins PB_n */
|
||||
#define SCU_SFSPB_0 SCU_SFS(PIN_GROUPB, PIN0)
|
||||
#define SCU_SFSPB_1 SCU_SFS(PIN_GROUPB, PIN1)
|
||||
#define SCU_SFSPB_2 SCU_SFS(PIN_GROUPB, PIN2)
|
||||
#define SCU_SFSPB_3 SCU_SFS(PIN_GROUPB, PIN3)
|
||||
#define SCU_SFSPB_4 SCU_SFS(PIN_GROUPB, PIN4)
|
||||
#define SCU_SFSPB_5 SCU_SFS(PIN_GROUPB, PIN5)
|
||||
#define SCU_SFSPB_6 SCU_SFS(PIN_GROUPB, PIN6)
|
||||
#define SCU_SFSPB_0 SCU_SFS(PIN_GROUPB, PIN0)
|
||||
#define SCU_SFSPB_1 SCU_SFS(PIN_GROUPB, PIN1)
|
||||
#define SCU_SFSPB_2 SCU_SFS(PIN_GROUPB, PIN2)
|
||||
#define SCU_SFSPB_3 SCU_SFS(PIN_GROUPB, PIN3)
|
||||
#define SCU_SFSPB_4 SCU_SFS(PIN_GROUPB, PIN4)
|
||||
#define SCU_SFSPB_5 SCU_SFS(PIN_GROUPB, PIN5)
|
||||
#define SCU_SFSPB_6 SCU_SFS(PIN_GROUPB, PIN6)
|
||||
|
||||
/* Pins PC_n */
|
||||
#define SCU_SFSPC_0 SCU_SFS(PIN_GROUPC, PIN0)
|
||||
#define SCU_SFSPC_1 SCU_SFS(PIN_GROUPC, PIN1)
|
||||
#define SCU_SFSPC_2 SCU_SFS(PIN_GROUPC, PIN2)
|
||||
#define SCU_SFSPC_3 SCU_SFS(PIN_GROUPC, PIN3)
|
||||
#define SCU_SFSPC_4 SCU_SFS(PIN_GROUPC, PIN4)
|
||||
#define SCU_SFSPC_5 SCU_SFS(PIN_GROUPC, PIN5)
|
||||
#define SCU_SFSPC_6 SCU_SFS(PIN_GROUPC, PIN6)
|
||||
#define SCU_SFSPC_7 SCU_SFS(PIN_GROUPC, PIN7)
|
||||
#define SCU_SFSPC_8 SCU_SFS(PIN_GROUPC, PIN8)
|
||||
#define SCU_SFSPC_9 SCU_SFS(PIN_GROUPC, PIN9)
|
||||
#define SCU_SFSPC_10 SCU_SFS(PIN_GROUPC, PIN10)
|
||||
#define SCU_SFSPC_11 SCU_SFS(PIN_GROUPC, PIN11)
|
||||
#define SCU_SFSPC_12 SCU_SFS(PIN_GROUPC, PIN12)
|
||||
#define SCU_SFSPC_13 SCU_SFS(PIN_GROUPC, PIN13)
|
||||
#define SCU_SFSPC_14 SCU_SFS(PIN_GROUPC, PIN14)
|
||||
#define SCU_SFSPC_0 SCU_SFS(PIN_GROUPC, PIN0)
|
||||
#define SCU_SFSPC_1 SCU_SFS(PIN_GROUPC, PIN1)
|
||||
#define SCU_SFSPC_2 SCU_SFS(PIN_GROUPC, PIN2)
|
||||
#define SCU_SFSPC_3 SCU_SFS(PIN_GROUPC, PIN3)
|
||||
#define SCU_SFSPC_4 SCU_SFS(PIN_GROUPC, PIN4)
|
||||
#define SCU_SFSPC_5 SCU_SFS(PIN_GROUPC, PIN5)
|
||||
#define SCU_SFSPC_6 SCU_SFS(PIN_GROUPC, PIN6)
|
||||
#define SCU_SFSPC_7 SCU_SFS(PIN_GROUPC, PIN7)
|
||||
#define SCU_SFSPC_8 SCU_SFS(PIN_GROUPC, PIN8)
|
||||
#define SCU_SFSPC_9 SCU_SFS(PIN_GROUPC, PIN9)
|
||||
#define SCU_SFSPC_10 SCU_SFS(PIN_GROUPC, PIN10)
|
||||
#define SCU_SFSPC_11 SCU_SFS(PIN_GROUPC, PIN11)
|
||||
#define SCU_SFSPC_12 SCU_SFS(PIN_GROUPC, PIN12)
|
||||
#define SCU_SFSPC_13 SCU_SFS(PIN_GROUPC, PIN13)
|
||||
#define SCU_SFSPC_14 SCU_SFS(PIN_GROUPC, PIN14)
|
||||
|
||||
/* Pins PD_n */
|
||||
#define SCU_SFSPD_0 SCU_SFS(PIN_GROUPD, PIN0)
|
||||
#define SCU_SFSPD_1 SCU_SFS(PIN_GROUPD, PIN1)
|
||||
#define SCU_SFSPD_2 SCU_SFS(PIN_GROUPD, PIN2)
|
||||
#define SCU_SFSPD_3 SCU_SFS(PIN_GROUPD, PIN3)
|
||||
#define SCU_SFSPD_4 SCU_SFS(PIN_GROUPD, PIN4)
|
||||
#define SCU_SFSPD_5 SCU_SFS(PIN_GROUPD, PIN5)
|
||||
#define SCU_SFSPD_6 SCU_SFS(PIN_GROUPD, PIN6)
|
||||
#define SCU_SFSPD_7 SCU_SFS(PIN_GROUPD, PIN7)
|
||||
#define SCU_SFSPD_8 SCU_SFS(PIN_GROUPD, PIN8)
|
||||
#define SCU_SFSPD_9 SCU_SFS(PIN_GROUPD, PIN9)
|
||||
#define SCU_SFSPD_10 SCU_SFS(PIN_GROUPD, PIN10)
|
||||
#define SCU_SFSPD_11 SCU_SFS(PIN_GROUPD, PIN11)
|
||||
#define SCU_SFSPD_12 SCU_SFS(PIN_GROUPD, PIN12)
|
||||
#define SCU_SFSPD_13 SCU_SFS(PIN_GROUPD, PIN13)
|
||||
#define SCU_SFSPD_14 SCU_SFS(PIN_GROUPD, PIN14)
|
||||
#define SCU_SFSPD_15 SCU_SFS(PIN_GROUPD, PIN15)
|
||||
#define SCU_SFSPD_16 SCU_SFS(PIN_GROUPD, PIN16)
|
||||
#define SCU_SFSPD_0 SCU_SFS(PIN_GROUPD, PIN0)
|
||||
#define SCU_SFSPD_1 SCU_SFS(PIN_GROUPD, PIN1)
|
||||
#define SCU_SFSPD_2 SCU_SFS(PIN_GROUPD, PIN2)
|
||||
#define SCU_SFSPD_3 SCU_SFS(PIN_GROUPD, PIN3)
|
||||
#define SCU_SFSPD_4 SCU_SFS(PIN_GROUPD, PIN4)
|
||||
#define SCU_SFSPD_5 SCU_SFS(PIN_GROUPD, PIN5)
|
||||
#define SCU_SFSPD_6 SCU_SFS(PIN_GROUPD, PIN6)
|
||||
#define SCU_SFSPD_7 SCU_SFS(PIN_GROUPD, PIN7)
|
||||
#define SCU_SFSPD_8 SCU_SFS(PIN_GROUPD, PIN8)
|
||||
#define SCU_SFSPD_9 SCU_SFS(PIN_GROUPD, PIN9)
|
||||
#define SCU_SFSPD_10 SCU_SFS(PIN_GROUPD, PIN10)
|
||||
#define SCU_SFSPD_11 SCU_SFS(PIN_GROUPD, PIN11)
|
||||
#define SCU_SFSPD_12 SCU_SFS(PIN_GROUPD, PIN12)
|
||||
#define SCU_SFSPD_13 SCU_SFS(PIN_GROUPD, PIN13)
|
||||
#define SCU_SFSPD_14 SCU_SFS(PIN_GROUPD, PIN14)
|
||||
#define SCU_SFSPD_15 SCU_SFS(PIN_GROUPD, PIN15)
|
||||
#define SCU_SFSPD_16 SCU_SFS(PIN_GROUPD, PIN16)
|
||||
|
||||
/* Pins PE_n */
|
||||
#define SCU_SFSPE_0 SCU_SFS(PIN_GROUPE, PIN0)
|
||||
#define SCU_SFSPE_1 SCU_SFS(PIN_GROUPE, PIN1)
|
||||
#define SCU_SFSPE_2 SCU_SFS(PIN_GROUPE, PIN2)
|
||||
#define SCU_SFSPE_3 SCU_SFS(PIN_GROUPE, PIN3)
|
||||
#define SCU_SFSPE_4 SCU_SFS(PIN_GROUPE, PIN4)
|
||||
#define SCU_SFSPE_5 SCU_SFS(PIN_GROUPE, PIN5)
|
||||
#define SCU_SFSPE_6 SCU_SFS(PIN_GROUPE, PIN6)
|
||||
#define SCU_SFSPE_7 SCU_SFS(PIN_GROUPE, PIN7)
|
||||
#define SCU_SFSPE_8 SCU_SFS(PIN_GROUPE, PIN8)
|
||||
#define SCU_SFSPE_9 SCU_SFS(PIN_GROUPE, PIN9)
|
||||
#define SCU_SFSPE_10 SCU_SFS(PIN_GROUPE, PIN10)
|
||||
#define SCU_SFSPE_11 SCU_SFS(PIN_GROUPE, PIN11)
|
||||
#define SCU_SFSPE_12 SCU_SFS(PIN_GROUPE, PIN12)
|
||||
#define SCU_SFSPE_13 SCU_SFS(PIN_GROUPE, PIN13)
|
||||
#define SCU_SFSPE_14 SCU_SFS(PIN_GROUPE, PIN14)
|
||||
#define SCU_SFSPE_15 SCU_SFS(PIN_GROUPE, PIN15)
|
||||
#define SCU_SFSPE_0 SCU_SFS(PIN_GROUPE, PIN0)
|
||||
#define SCU_SFSPE_1 SCU_SFS(PIN_GROUPE, PIN1)
|
||||
#define SCU_SFSPE_2 SCU_SFS(PIN_GROUPE, PIN2)
|
||||
#define SCU_SFSPE_3 SCU_SFS(PIN_GROUPE, PIN3)
|
||||
#define SCU_SFSPE_4 SCU_SFS(PIN_GROUPE, PIN4)
|
||||
#define SCU_SFSPE_5 SCU_SFS(PIN_GROUPE, PIN5)
|
||||
#define SCU_SFSPE_6 SCU_SFS(PIN_GROUPE, PIN6)
|
||||
#define SCU_SFSPE_7 SCU_SFS(PIN_GROUPE, PIN7)
|
||||
#define SCU_SFSPE_8 SCU_SFS(PIN_GROUPE, PIN8)
|
||||
#define SCU_SFSPE_9 SCU_SFS(PIN_GROUPE, PIN9)
|
||||
#define SCU_SFSPE_10 SCU_SFS(PIN_GROUPE, PIN10)
|
||||
#define SCU_SFSPE_11 SCU_SFS(PIN_GROUPE, PIN11)
|
||||
#define SCU_SFSPE_12 SCU_SFS(PIN_GROUPE, PIN12)
|
||||
#define SCU_SFSPE_13 SCU_SFS(PIN_GROUPE, PIN13)
|
||||
#define SCU_SFSPE_14 SCU_SFS(PIN_GROUPE, PIN14)
|
||||
#define SCU_SFSPE_15 SCU_SFS(PIN_GROUPE, PIN15)
|
||||
|
||||
/* Pins PF_n */
|
||||
#define SCU_SFSPF_0 SCU_SFS(PIN_GROUPF, PIN0)
|
||||
#define SCU_SFSPF_1 SCU_SFS(PIN_GROUPF, PIN1)
|
||||
#define SCU_SFSPF_2 SCU_SFS(PIN_GROUPF, PIN2)
|
||||
#define SCU_SFSPF_3 SCU_SFS(PIN_GROUPF, PIN3)
|
||||
#define SCU_SFSPF_4 SCU_SFS(PIN_GROUPF, PIN4)
|
||||
#define SCU_SFSPF_5 SCU_SFS(PIN_GROUPF, PIN5)
|
||||
#define SCU_SFSPF_6 SCU_SFS(PIN_GROUPF, PIN6)
|
||||
#define SCU_SFSPF_7 SCU_SFS(PIN_GROUPF, PIN7)
|
||||
#define SCU_SFSPF_8 SCU_SFS(PIN_GROUPF, PIN8)
|
||||
#define SCU_SFSPF_9 SCU_SFS(PIN_GROUPF, PIN9)
|
||||
#define SCU_SFSPF_10 SCU_SFS(PIN_GROUPF, PIN10)
|
||||
#define SCU_SFSPF_11 SCU_SFS(PIN_GROUPF, PIN11)
|
||||
#define SCU_SFSPF_0 SCU_SFS(PIN_GROUPF, PIN0)
|
||||
#define SCU_SFSPF_1 SCU_SFS(PIN_GROUPF, PIN1)
|
||||
#define SCU_SFSPF_2 SCU_SFS(PIN_GROUPF, PIN2)
|
||||
#define SCU_SFSPF_3 SCU_SFS(PIN_GROUPF, PIN3)
|
||||
#define SCU_SFSPF_4 SCU_SFS(PIN_GROUPF, PIN4)
|
||||
#define SCU_SFSPF_5 SCU_SFS(PIN_GROUPF, PIN5)
|
||||
#define SCU_SFSPF_6 SCU_SFS(PIN_GROUPF, PIN6)
|
||||
#define SCU_SFSPF_7 SCU_SFS(PIN_GROUPF, PIN7)
|
||||
#define SCU_SFSPF_8 SCU_SFS(PIN_GROUPF, PIN8)
|
||||
#define SCU_SFSPF_9 SCU_SFS(PIN_GROUPF, PIN9)
|
||||
#define SCU_SFSPF_10 SCU_SFS(PIN_GROUPF, PIN10)
|
||||
#define SCU_SFSPF_11 SCU_SFS(PIN_GROUPF, PIN11)
|
||||
|
||||
/* CLKn pins */
|
||||
#define SCU_SFSCLK0 MMIO32(SCU_BASE + 0xC00)
|
||||
#define SCU_SFSCLK1 MMIO32(SCU_BASE + 0xC04)
|
||||
#define SCU_SFSCLK2 MMIO32(SCU_BASE + 0xC08)
|
||||
#define SCU_SFSCLK3 MMIO32(SCU_BASE + 0xC0C)
|
||||
#define SCU_SFSCLK0 MMIO32(SCU_BASE + 0xC00)
|
||||
#define SCU_SFSCLK1 MMIO32(SCU_BASE + 0xC04)
|
||||
#define SCU_SFSCLK2 MMIO32(SCU_BASE + 0xC08)
|
||||
#define SCU_SFSCLK3 MMIO32(SCU_BASE + 0xC0C)
|
||||
|
||||
/* USB1 USB1_DP/USB1_DM pins and I2C-bus open-drain pins */
|
||||
#define SCU_SFSUSB MMIO32(SCU_BASE + 0xC80)
|
||||
#define SCU_SFSI2C0 MMIO32(SCU_BASE + 0xC84)
|
||||
#define SCU_SFSUSB MMIO32(SCU_BASE + 0xC80)
|
||||
#define SCU_SFSI2C0 MMIO32(SCU_BASE + 0xC84)
|
||||
|
||||
/* ADC pin select registers */
|
||||
|
||||
/* ADC0 function select register */
|
||||
#define SCU_ENAIO0 MMIO32(SCU_BASE + 0xC88)
|
||||
#define SCU_ENAIO0 MMIO32(SCU_BASE + 0xC88)
|
||||
|
||||
/* ADC1 function select register */
|
||||
#define SCU_ENAIO1 MMIO32(SCU_BASE + 0xC8C)
|
||||
#define SCU_ENAIO1 MMIO32(SCU_BASE + 0xC8C)
|
||||
|
||||
/* Analog function select register */
|
||||
#define SCU_ENAIO2 MMIO32(SCU_BASE + 0xC90)
|
||||
#define SCU_ENAIO2 MMIO32(SCU_BASE + 0xC90)
|
||||
|
||||
/* EMC clock delay register */
|
||||
#define SCU_EMCDELAYCLK MMIO32(SCU_BASE + 0xD00)
|
||||
#define SCU_EMCDELAYCLK MMIO32(SCU_BASE + 0xD00)
|
||||
|
||||
/* Pin interrupt select registers */
|
||||
|
||||
/* Pin interrupt select register for pin interrupts 0 to 3 */
|
||||
#define SCU_PINTSEL0 MMIO32(SCU_BASE + 0xE00)
|
||||
#define SCU_PINTSEL0 MMIO32(SCU_BASE + 0xE00)
|
||||
|
||||
/* Pin interrupt select register for pin interrupts 4 to 7 */
|
||||
#define SCU_PINTSEL1 MMIO32(SCU_BASE + 0xE04)
|
||||
#define SCU_PINTSEL1 MMIO32(SCU_BASE + 0xE04)
|
||||
|
||||
/**************************/
|
||||
/* SCU I2C0 Configuration */
|
||||
|
||||
@ -26,67 +26,67 @@
|
||||
/* --- Convenience macros -------------------------------------------------- */
|
||||
|
||||
/* SSP port base addresses (for convenience) */
|
||||
#define SSP0 SSP0_BASE
|
||||
#define SSP1 SSP1_BASE
|
||||
#define SSP0 SSP0_BASE
|
||||
#define SSP1 SSP1_BASE
|
||||
|
||||
|
||||
/* --- SSP registers ------------------------------------------------------- */
|
||||
|
||||
/* Control Register 0 */
|
||||
#define SSP_CR0(port) MMIO32(port + 0x000)
|
||||
#define SSP0_CR0 SSP_CR0(SSP0)
|
||||
#define SSP1_CR0 SSP_CR0(SSP1)
|
||||
#define SSP_CR0(port) MMIO32(port + 0x000)
|
||||
#define SSP0_CR0 SSP_CR0(SSP0)
|
||||
#define SSP1_CR0 SSP_CR0(SSP1)
|
||||
|
||||
/* Control Register 1 */
|
||||
#define SSP_CR1(port) MMIO32(port + 0x004)
|
||||
#define SSP0_CR1 SSP_CR1(SSP0)
|
||||
#define SSP1_CR1 SSP_CR1(SSP1)
|
||||
#define SSP_CR1(port) MMIO32(port + 0x004)
|
||||
#define SSP0_CR1 SSP_CR1(SSP0)
|
||||
#define SSP1_CR1 SSP_CR1(SSP1)
|
||||
|
||||
/* Data Register */
|
||||
#define SSP_DR(port) MMIO32(port + 0x008)
|
||||
#define SSP0_DR SSP_DR(SSP0)
|
||||
#define SSP1_DR SSP_DR(SSP1)
|
||||
#define SSP_DR(port) MMIO32(port + 0x008)
|
||||
#define SSP0_DR SSP_DR(SSP0)
|
||||
#define SSP1_DR SSP_DR(SSP1)
|
||||
|
||||
/* Status Register */
|
||||
#define SSP_SR(port) MMIO32(port + 0x00C)
|
||||
#define SSP0_SR SSP_SR(SSP0)
|
||||
#define SSP1_SR SSP_SR(SSP1)
|
||||
#define SSP_SR(port) MMIO32(port + 0x00C)
|
||||
#define SSP0_SR SSP_SR(SSP0)
|
||||
#define SSP1_SR SSP_SR(SSP1)
|
||||
|
||||
#define SSP_SR_TFE BIT0
|
||||
#define SSP_SR_TNF BIT1
|
||||
#define SSP_SR_RNE BIT2
|
||||
#define SSP_SR_RFF BIT3
|
||||
#define SSP_SR_BSY BIT4
|
||||
#define SSP_SR_TFE BIT0
|
||||
#define SSP_SR_TNF BIT1
|
||||
#define SSP_SR_RNE BIT2
|
||||
#define SSP_SR_RFF BIT3
|
||||
#define SSP_SR_BSY BIT4
|
||||
|
||||
/* Clock Prescale Register */
|
||||
#define SSP_CPSR(port) MMIO32(port + 0x010)
|
||||
#define SSP0_CPSR SSP_CPSR(SSP0)
|
||||
#define SSP1_CPSR SSP_CPSR(SSP1)
|
||||
#define SSP_CPSR(port) MMIO32(port + 0x010)
|
||||
#define SSP0_CPSR SSP_CPSR(SSP0)
|
||||
#define SSP1_CPSR SSP_CPSR(SSP1)
|
||||
|
||||
/* Interrupt Mask Set and Clear Register */
|
||||
#define SSP_IMSC(port) MMIO32(port + 0x014)
|
||||
#define SSP0_IMSC SSP_IMSC(SSP0)
|
||||
#define SSP1_IMSC SSP_IMSC(SSP1)
|
||||
#define SSP_IMSC(port) MMIO32(port + 0x014)
|
||||
#define SSP0_IMSC SSP_IMSC(SSP0)
|
||||
#define SSP1_IMSC SSP_IMSC(SSP1)
|
||||
|
||||
/* Raw Interrupt Status Register */
|
||||
#define SSP_RIS(port) MMIO32(port + 0x018)
|
||||
#define SSP0_RIS SSP_RIS(SSP0)
|
||||
#define SSP1_RIS SSP_RIS(SSP1)
|
||||
#define SSP_RIS(port) MMIO32(port + 0x018)
|
||||
#define SSP0_RIS SSP_RIS(SSP0)
|
||||
#define SSP1_RIS SSP_RIS(SSP1)
|
||||
|
||||
/* Masked Interrupt Status Register */
|
||||
#define SSP_MIS(port) MMIO32(port + 0x01C)
|
||||
#define SSP0_MIS SSP_MIS(SSP0)
|
||||
#define SSP1_MIS SSP_MIS(SSP1)
|
||||
#define SSP_MIS(port) MMIO32(port + 0x01C)
|
||||
#define SSP0_MIS SSP_MIS(SSP0)
|
||||
#define SSP1_MIS SSP_MIS(SSP1)
|
||||
|
||||
/* SSPICR Interrupt Clear Register */
|
||||
#define SSP_ICR(port) MMIO32(port + 0x020)
|
||||
#define SSP0_ICR SSP_ICR(SSP0)
|
||||
#define SSP1_ICR SSP_ICR(SSP1)
|
||||
#define SSP_ICR(port) MMIO32(port + 0x020)
|
||||
#define SSP0_ICR SSP_ICR(SSP0)
|
||||
#define SSP1_ICR SSP_ICR(SSP1)
|
||||
|
||||
/* SSP1 DMA control register */
|
||||
#define SSP_DMACR(port) MMIO32(port + 0x024)
|
||||
#define SSP0_DMACR SSP_DMACR(SSP0)
|
||||
#define SSP1_DMACR SSP_DMACR(SSP1)
|
||||
#define SSP_DMACR(port) MMIO32(port + 0x024)
|
||||
#define SSP0_DMACR SSP_DMACR(SSP0)
|
||||
#define SSP1_DMACR SSP_DMACR(SSP1)
|
||||
|
||||
typedef enum {
|
||||
SSP0_NUM = 0x0,
|
||||
@ -115,17 +115,17 @@ typedef enum {
|
||||
|
||||
/* SSP Frame Format/Type Bits 4 & 5 */
|
||||
typedef enum {
|
||||
SSP_FRAME_SPI = 0x00,
|
||||
SSP_FRAME_TI = BIT4,
|
||||
SSP_FRAM_MICROWIRE = BIT5
|
||||
SSP_FRAME_SPI = 0x00,
|
||||
SSP_FRAME_TI = BIT4,
|
||||
SSP_FRAM_MICROWIRE = BIT5
|
||||
} ssp_frame_format_t;
|
||||
|
||||
/* Clock Out Polarity / Clock Out Phase Bits Bits 6 & 7 */
|
||||
typedef enum {
|
||||
SSP_CPOL_0_CPHA_0 = 0x0,
|
||||
SSP_CPOL_1_CPHA_0 = BIT6,
|
||||
SSP_CPOL_0_CPHA_1 = BIT7,
|
||||
SSP_CPOL_1_CPHA_1 = (BIT6|BIT7)
|
||||
SSP_CPOL_0_CPHA_0 = 0x0,
|
||||
SSP_CPOL_1_CPHA_0 = BIT6,
|
||||
SSP_CPOL_0_CPHA_1 = BIT7,
|
||||
SSP_CPOL_1_CPHA_1 = (BIT6|BIT7)
|
||||
} ssp_cpol_cpha_t;
|
||||
|
||||
/*
|
||||
@ -133,8 +133,8 @@ typedef enum {
|
||||
*/
|
||||
/* SSP Mode Bit0 */
|
||||
typedef enum {
|
||||
SSP_MODE_NORMAL = 0x0,
|
||||
SSP_MODE_LOOPBACK = BIT0
|
||||
SSP_MODE_NORMAL = 0x0,
|
||||
SSP_MODE_LOOPBACK = BIT0
|
||||
} ssp_mode_t;
|
||||
|
||||
/* SSP Enable Bit1 */
|
||||
@ -142,8 +142,8 @@ typedef enum {
|
||||
|
||||
/* SSP Master/Slave Mode Bit2 */
|
||||
typedef enum {
|
||||
SSP_MASTER = 0x0,
|
||||
SSP_SLAVE = BIT2
|
||||
SSP_MASTER = 0x0,
|
||||
SSP_SLAVE = BIT2
|
||||
} ssp_master_slave_t;
|
||||
|
||||
/*
|
||||
@ -153,13 +153,13 @@ typedef enum {
|
||||
* transmit data line (MISO).
|
||||
*/
|
||||
typedef enum {
|
||||
SSP_SLAVE_OUT_ENABLE = 0x0,
|
||||
SSP_SLAVE_OUT_DISABLE = BIT3
|
||||
SSP_SLAVE_OUT_ENABLE = 0x0,
|
||||
SSP_SLAVE_OUT_DISABLE = BIT3
|
||||
} ssp_slave_option_t; /* This option is relevant only in slave mode */
|
||||
|
||||
void ssp_disable(ssp_num_t ssp_num);
|
||||
|
||||
void ssp_init( ssp_num_t ssp_num,
|
||||
void ssp_init(ssp_num_t ssp_num,
|
||||
ssp_datasize_t data_size,
|
||||
ssp_frame_format_t frame_format,
|
||||
ssp_cpol_cpha_t cpol_cpha_format,
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user