From 486446e1db1f4f369848af9ca281ebebbb3886ad Mon Sep 17 00:00:00 2001
From: vector <ettore.zaffaroni@gmail.com>
Date: Tue, 7 May 2019 18:29:48 +0200
Subject: [PATCH] STM32F4-7: add DAC_SR status bits

Include the DAC_SR register and it's bits.  Arguably this should be jsut
included in the common_all file.
---
 include/libopencm3/stm32/f4/dac.h | 16 ++++++++++++++++
 include/libopencm3/stm32/f7/dac.h | 13 +++++++++++++
 2 files changed, 29 insertions(+)

diff --git a/include/libopencm3/stm32/f4/dac.h b/include/libopencm3/stm32/f4/dac.h
index f7714f3d..c13a6a32 100644
--- a/include/libopencm3/stm32/f4/dac.h
+++ b/include/libopencm3/stm32/f4/dac.h
@@ -33,5 +33,21 @@ LGPL License Terms @ref lgpl_license
 
 #include <libopencm3/stm32/common/dac_common_all.h>
 
+
+/** DAC status register (DAC_SR).
+ * not available on STM32F4x1/STM32F4x2 */
+#define DAC_SR				MMIO32(DAC_BASE + 0x34)
+
+/* --- DAC_SR values ------------------------------------------------------- */
+
+/** DMAUDR2: DAC channel 1 DMA underrun flag */
+#define DAC_SR_DMAUDR1		(1 << 13)
+
+
+/** DMAUDR2: DAC channel 2 DMA underrun flag.
+ * not available on STM32F4x1/STM32F4x2 and STM32F410*/
+#define DAC_SR_DMAUDR2		(1 << 29)
+
+
 #endif
 
diff --git a/include/libopencm3/stm32/f7/dac.h b/include/libopencm3/stm32/f7/dac.h
index a07a83d0..5f6c34d2 100644
--- a/include/libopencm3/stm32/f7/dac.h
+++ b/include/libopencm3/stm32/f7/dac.h
@@ -33,5 +33,18 @@ LGPL License Terms @ref lgpl_license
 
 #include <libopencm3/stm32/common/dac_common_all.h>
 
+/** DAC status register (DAC_SR) */
+#define DAC_SR				MMIO32(DAC_BASE + 0x34)
+
+/* --- DAC_SR values ------------------------------------------------------- */
+
+/** DMAUDR1: DAC channel 1 DMA underrun flag */
+#define DAC_SR_DMAUDR1		(1 << 13)
+
+
+/** DMAUDR2: DAC channel 2 DMA underrun flag */
+#define DAC_SR_DMAUDR2		(1 << 29)
+
+
 #endif