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[l1] fix whitespace and missing license info

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Earlier additions to the L1 support were not correctly using linux
coding guidelines as specified in /HACKING.

Some examples were also missing license information.
This commit is contained in:
Karl Palsson 2013-01-22 21:51:24 +00:00
parent 20bfcaeb1c
commit 48eed286b9
6 changed files with 200 additions and 165 deletions
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168
examples/stm32/l1/stm32l-discovery/button-irq-printf/main.c
View File

@ -1,5 +1,20 @@
/* /*
* Karl Palsson, 2012 <karlp@tweak.net.au * This file is part of the libopencm3 project.
*
* Copyright (C) 2012 Karl Palsson <karlp@tweak.net.au>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <errno.h> #include <errno.h>
@ -15,35 +30,38 @@
static struct state_t state; static struct state_t state;
void clock_setup(void) { void clock_setup(void)
/* Lots of things on all ports... */ {
rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOAEN); /* Lots of things on all ports... */
rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOBEN); rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOAEN);
rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOBEN);
/* Enable clocks for USART2. */ /* Enable clocks for USART2. */
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN); rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN);
} }
void gpio_setup(void) { void gpio_setup(void)
gpio_mode_setup(LED_DISCO_GREEN_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, LED_DISCO_GREEN_PIN); {
gpio_mode_setup(LED_DISCO_GREEN_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, LED_DISCO_GREEN_PIN);
/* Setup GPIO pins for USART2 transmit. */ /* Setup GPIO pins for USART2 transmit. */
gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2); gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2);
/* Setup USART2 TX pin as alternate function. */ /* Setup USART2 TX pin as alternate function. */
gpio_set_af(GPIOA, GPIO_AF7, GPIO2); gpio_set_af(GPIOA, GPIO_AF7, GPIO2);
} }
void usart_setup(void) { void usart_setup(void)
usart_set_baudrate(USART_CONSOLE, 115200); {
usart_set_databits(USART_CONSOLE, 8); usart_set_baudrate(USART_CONSOLE, 115200);
usart_set_stopbits(USART_CONSOLE, USART_STOPBITS_1); usart_set_databits(USART_CONSOLE, 8);
usart_set_mode(USART_CONSOLE, USART_MODE_TX); usart_set_stopbits(USART_CONSOLE, USART_STOPBITS_1);
usart_set_parity(USART_CONSOLE, USART_PARITY_NONE); usart_set_mode(USART_CONSOLE, USART_MODE_TX);
usart_set_flow_control(USART_CONSOLE, USART_FLOWCONTROL_NONE); usart_set_parity(USART_CONSOLE, USART_PARITY_NONE);
usart_set_flow_control(USART_CONSOLE, USART_FLOWCONTROL_NONE);
/* Finally enable the USART. */ /* Finally enable the USART. */
usart_enable(USART_CONSOLE); usart_enable(USART_CONSOLE);
} }
/** /**
@ -53,65 +71,69 @@ void usart_setup(void) {
* @param len * @param len
* @return * @return
*/ */
int _write(int file, char *ptr, int len) { int _write(int file, char *ptr, int len)
int i; {
int i;
if (file == STDOUT_FILENO || file == STDERR_FILENO) { if (file == STDOUT_FILENO || file == STDERR_FILENO) {
for (i = 0; i < len; i++) { for (i = 0; i < len; i++) {
if (ptr[i] == '\n') { if (ptr[i] == '\n') {
usart_send_blocking(USART_CONSOLE, '\r'); usart_send_blocking(USART_CONSOLE, '\r');
} }
usart_send_blocking(USART_CONSOLE, ptr[i]); usart_send_blocking(USART_CONSOLE, ptr[i]);
} }
return i; return i;
} }
errno = EIO; errno = EIO;
return -1; return -1;
} }
void BUTTON_DISCO_USER_isr(void) { void BUTTON_DISCO_USER_isr(void)
exti_reset_request(BUTTON_DISCO_USER_EXTI); {
if (state.falling) { exti_reset_request(BUTTON_DISCO_USER_EXTI);
state.falling = false; if (state.falling) {
exti_set_trigger(BUTTON_DISCO_USER_EXTI, EXTI_TRIGGER_RISING); state.falling = false;
// ILOG("fell: %d\n", TIM_CNT(TIM7)); exti_set_trigger(BUTTON_DISCO_USER_EXTI, EXTI_TRIGGER_RISING);
puts("fell!\n"); // ILOG("fell: %d\n", TIM_CNT(TIM7));
} else { puts("fell!\n");
puts("Rose!\n"); } else {
// TIM_CNT(TIM7) = 0; puts("Rose!\n");
state.falling = true; // TIM_CNT(TIM7) = 0;
exti_set_trigger(BUTTON_DISCO_USER_EXTI, EXTI_TRIGGER_FALLING); state.falling = true;
} exti_set_trigger(BUTTON_DISCO_USER_EXTI, EXTI_TRIGGER_FALLING);
}
} }
void setup_buttons(void) { void setup_buttons(void)
/* Enable EXTI0 interrupt. */ {
nvic_enable_irq(BUTTON_DISCO_USER_NVIC); /* Enable EXTI0 interrupt. */
nvic_enable_irq(BUTTON_DISCO_USER_NVIC);
gpio_mode_setup(BUTTON_DISCO_USER_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, BUTTON_DISCO_USER_PIN); gpio_mode_setup(BUTTON_DISCO_USER_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, BUTTON_DISCO_USER_PIN);
/* Configure the EXTI subsystem. */ /* Configure the EXTI subsystem. */
exti_select_source(BUTTON_DISCO_USER_EXTI, BUTTON_DISCO_USER_PORT); exti_select_source(BUTTON_DISCO_USER_EXTI, BUTTON_DISCO_USER_PORT);
state.falling = false; state.falling = false;
exti_set_trigger(BUTTON_DISCO_USER_EXTI, EXTI_TRIGGER_RISING); exti_set_trigger(BUTTON_DISCO_USER_EXTI, EXTI_TRIGGER_RISING);
exti_enable_request(BUTTON_DISCO_USER_EXTI); exti_enable_request(BUTTON_DISCO_USER_EXTI);
} }
int main(void) { int main(void)
int i; {
int j = 0; int i;
clock_setup(); int j = 0;
gpio_setup(); clock_setup();
usart_setup(); gpio_setup();
puts("hi guys!\n"); usart_setup();
setup_buttons(); puts("hi guys!\n");
while (1) { setup_buttons();
puts("tick:"); while (1) {
putchar('a' + (j++ % 26)); puts("tick:");
gpio_toggle(GPIOB, GPIO7); /* LED on/off */ putchar('a' + (j++ % 26));
for (i = 0; i < 100000; i++) /* Wait a bit. */ gpio_toggle(GPIOB, GPIO7); /* LED on/off */
__asm__("NOP"); for (i = 0; i < 100000; i++) /* Wait a bit. */
} __asm__("NOP");
}
return 0; return 0;
} }

24
examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h
View File

@ -1,7 +1,20 @@
/* /*
* General configuration of the device * This file is part of the libopencm3 project.
* *
* Karl Palsson <karlp@tweak.net.au> 2012 * Copyright (C) 2012 Karl Palsson <karlp@tweak.net.au>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/ */
#ifndef SYSCFG_H #ifndef SYSCFG_H
@ -31,10 +44,9 @@ extern "C" {
#define BUTTON_DISCO_USER_isr exti0_isr #define BUTTON_DISCO_USER_isr exti0_isr
#define BUTTON_DISCO_USER_NVIC NVIC_EXTI0_IRQ #define BUTTON_DISCO_USER_NVIC NVIC_EXTI0_IRQ
struct state_t {
struct state_t { bool falling;
bool falling; };
};
#ifdef __cplusplus #ifdef __cplusplus

88
examples/stm32/l1/stm32l-discovery/usart/usart.c
View File

@ -22,59 +22,63 @@
#include <libopencm3/stm32/l1/gpio.h> #include <libopencm3/stm32/l1/gpio.h>
#include <libopencm3/stm32/usart.h> #include <libopencm3/stm32/usart.h>
void clock_setup(void) { void clock_setup(void)
/* We are running on MSI after boot. */ {
/* Enable GPIOD clock for LED & USARTs. */ /* We are running on MSI after boot. */
rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOAEN); /* Enable GPIOD clock for LED & USARTs. */
rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOBEN); rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOAEN);
rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOBEN);
/* Enable clocks for USART2. */ /* Enable clocks for USART2. */
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN); rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN);
} }
void usart_setup(void) { void usart_setup(void)
/* Setup USART2 parameters. */ {
usart_set_baudrate(USART2, 38400); /* Setup USART2 parameters. */
usart_set_databits(USART2, 8); usart_set_baudrate(USART2, 38400);
usart_set_stopbits(USART2, USART_STOPBITS_1); usart_set_databits(USART2, 8);
usart_set_mode(USART2, USART_MODE_TX); usart_set_stopbits(USART2, USART_STOPBITS_1);
usart_set_parity(USART2, USART_PARITY_NONE); usart_set_mode(USART2, USART_MODE_TX);
usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE); usart_set_parity(USART2, USART_PARITY_NONE);
usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE);
/* Finally enable the USART. */ /* Finally enable the USART. */
usart_enable(USART2); usart_enable(USART2);
} }
void gpio_setup(void) { void gpio_setup(void)
/* Setup GPIO pin GPIO7 on GPIO port B for Green LED. */ {
gpio_mode_setup(GPIOB, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO7); /* Setup GPIO pin GPIO7 on GPIO port B for Green LED. */
gpio_mode_setup(GPIOB, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO7);
/* Setup GPIO pins for USART2 transmit. */ /* Setup GPIO pins for USART2 transmit. */
gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2); gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2);
/* Setup USART2 TX pin as alternate function. */ /* Setup USART2 TX pin as alternate function. */
gpio_set_af(GPIOA, GPIO_AF7, GPIO2); gpio_set_af(GPIOA, GPIO_AF7, GPIO2);
} }
int main(void) { int main(void)
int i, j = 0, c = 0; {
int i, j = 0, c = 0;
clock_setup(); clock_setup();
gpio_setup(); gpio_setup();
usart_setup(); usart_setup();
/* Blink the LED (PD12) on the board with every transmitted byte. */ /* Blink the LED (PD12) on the board with every transmitted byte. */
while (1) { while (1) {
gpio_toggle(GPIOB, GPIO7); /* LED on/off */ gpio_toggle(GPIOB, GPIO7); /* LED on/off */
usart_send_blocking(USART2, c + '0'); /* USART2: Send byte. */ usart_send_blocking(USART2, c + '0'); /* USART2: Send byte. */
c = (c == 9) ? 0 : c + 1; /* Increment c. */ c = (c == 9) ? 0 : c + 1; /* Increment c. */
if ((j++ % 80) == 0) { /* Newline after line full. */ if ((j++ % 80) == 0) { /* Newline after line full. */
usart_send_blocking(USART2, '\r'); usart_send_blocking(USART2, '\r');
usart_send_blocking(USART2, '\n'); usart_send_blocking(USART2, '\n');
} }
for (i = 0; i < 100000; i++) /* Wait a bit. */ for (i = 0; i < 100000; i++) /* Wait a bit. */
__asm__("NOP"); __asm__("NOP");
} }
return 0; return 0;
} }

54
include/libopencm3/stm32/l1/flash.h
View File

@ -33,10 +33,10 @@
#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00) #define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)
#define FLASH_PECR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04) #define FLASH_PECR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04)
#define FLASH_PDKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08) #define FLASH_PDKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
#define FLASH_PEKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C) #define FLASH_PEKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
#define FLASH_PRGKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10) #define FLASH_PRGKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14) #define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x18) #define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x18)
#define FLASH_OBR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x1c) #define FLASH_OBR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x1c)
#define FLASH_WRPR1 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20) #define FLASH_WRPR1 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)
@ -46,9 +46,9 @@
/* --- FLASH_ACR values ---------------------------------------------------- */ /* --- FLASH_ACR values ---------------------------------------------------- */
#define FLASH_RUNPD (1 << 4) #define FLASH_RUNPD (1 << 4)
#define FLASH_SLEEPPD (1 << 3) #define FLASH_SLEEPPD (1 << 3)
#define FLASH_ACC64 (1 << 2) #define FLASH_ACC64 (1 << 2)
#define FLASH_PRFTEN (1 << 1) #define FLASH_PRFTEN (1 << 1)
#define FLASH_LATENCY_0WS 0x00 #define FLASH_LATENCY_0WS 0x00
#define FLASH_LATENCY_1WS 0x01 #define FLASH_LATENCY_1WS 0x01
@ -85,30 +85,30 @@
/* --- FLASH_SR values ----------------------------------------------------- */ /* --- FLASH_SR values ----------------------------------------------------- */
#define FLASH_OPTVERRUSR (1 << 12) #define FLASH_OPTVERRUSR (1 << 12)
#define FLASH_OPTVERR (1 << 11) #define FLASH_OPTVERR (1 << 11)
#define FLASH_SIZEERR (1 << 10) #define FLASH_SIZEERR (1 << 10)
#define FLASH_PGAERR (1 << 9) #define FLASH_PGAERR (1 << 9)
#define FLASH_WRPERR (1 << 8) #define FLASH_WRPERR (1 << 8)
#define FLASH_READY (1 << 3) #define FLASH_READY (1 << 3)
#define FLASH_ENDHV (1 << 2) #define FLASH_ENDHV (1 << 2)
#define FLASH_EOP (1 << 1) #define FLASH_EOP (1 << 1)
#define FLASH_BSY (1 << 0) #define FLASH_BSY (1 << 0)
/* --- FLASH_OBR values ----------------------------------------------------- */ /* --- FLASH_OBR values ----------------------------------------------------- */
#define FLASH_BFB2 (1 << 23) #define FLASH_BFB2 (1 << 23)
#define FLASH_NRST_STDBY (1 << 22) #define FLASH_NRST_STDBY (1 << 22)
#define FLASH_NRST_STOP (1 << 21) #define FLASH_NRST_STOP (1 << 21)
#define FLASH_IWDG_SW (1 << 20) #define FLASH_IWDG_SW (1 << 20)
#define FLASH_BOR_OFF (0x0 << 16) #define FLASH_BOR_OFF (0x0 << 16)
#define FLASH_BOR_LEVEL_1 (0x8 << 16) #define FLASH_BOR_LEVEL_1 (0x8 << 16)
#define FLASH_BOR_LEVEL_2 (0x9 << 16) #define FLASH_BOR_LEVEL_2 (0x9 << 16)
#define FLASH_BOR_LEVEL_3 (0xa << 16) #define FLASH_BOR_LEVEL_3 (0xa << 16)
#define FLASH_BOR_LEVEL_4 (0xb << 16) #define FLASH_BOR_LEVEL_4 (0xb << 16)
#define FLASH_BOR_LEVEL_5 (0xc << 16) #define FLASH_BOR_LEVEL_5 (0xc << 16)
#define FLASH_RDPRT_LEVEL_0 (0xaa) #define FLASH_RDPRT_LEVEL_0 (0xaa)
#define FLASH_RDPRT_LEVEL_1 (0x00) #define FLASH_RDPRT_LEVEL_1 (0x00)
#define FLASH_RDPRT_LEVEL_2 (0xcc) #define FLASH_RDPRT_LEVEL_2 (0xcc)
/* --- Function prototypes ------------------------------------------------- */ /* --- Function prototypes ------------------------------------------------- */

28
include/libopencm3/stm32/l1/pwr.h
View File

@ -33,49 +33,47 @@
/* Bits [31:15]: Reserved */ /* Bits [31:15]: Reserved */
/* LPRUN: Low power run mode */ /* LPRUN: Low power run mode */
#define PWR_CR_LPRUN (1 << 14) #define PWR_CR_LPRUN (1 << 14)
/* VOS[12:11]: Regulator voltage scaling output selection */ /* VOS[12:11]: Regulator voltage scaling output selection */
#define PWR_CR_VOS_LSB 11 #define PWR_CR_VOS_LSB 11
/** @defgroup pwr_vos Voltage Scaling Output level selection /** @defgroup pwr_vos Voltage Scaling Output level selection
@ingroup STM32F_pwr_defines @ingroup STM32F_pwr_defines
@{*/ @{*/
#define PWR_CR_VOS_RANGE1 (0x1 << PWR_CR_VOS_LSB) #define PWR_CR_VOS_RANGE1 (0x1 << PWR_CR_VOS_LSB)
#define PWR_CR_VOS_RANGE2 (0x2 << PWR_CR_VOS_LSB) #define PWR_CR_VOS_RANGE2 (0x2 << PWR_CR_VOS_LSB)
#define PWR_CR_VOS_RANGE3 (0x3 << PWR_CR_VOS_LSB) #define PWR_CR_VOS_RANGE3 (0x3 << PWR_CR_VOS_LSB)
/**@}*/ /**@}*/
#define PWR_CR_VOS_MASK (0x3 << PWR_CR_VOS_LSB) #define PWR_CR_VOS_MASK (0x3 << PWR_CR_VOS_LSB)
/* FWU: Fast wakeup */ /* FWU: Fast wakeup */
#define PWR_CR_FWU (1 << 10) #define PWR_CR_FWU (1 << 10)
/* ULP: Ultralow power mode */ /* ULP: Ultralow power mode */
#define PWR_CR_ULP (1 << 9) #define PWR_CR_ULP (1 << 9)
/* --- PWR_CSR values ------------------------------------------------------- */ /* --- PWR_CSR values ------------------------------------------------------- */
/* Bits [31:11]: Reserved */ /* Bits [31:11]: Reserved */
/* EWUP3: Enable WKUP3 pin */ /* EWUP3: Enable WKUP3 pin */
#define PWR_CSR_EWUP3 (1 << 10) #define PWR_CSR_EWUP3 (1 << 10)
/* EWUP2: Enable WKUP2 pin */ /* EWUP2: Enable WKUP2 pin */
#define PWR_CSR_EWUP2 (1 << 9) #define PWR_CSR_EWUP2 (1 << 9)
/* EWUP1: Enable WKUP1 pin */ /* EWUP1: Enable WKUP1 pin */
#define PWR_CSR_EWUP1 PWR_CSR_EWUP #define PWR_CSR_EWUP1 PWR_CSR_EWUP
/* REGLPF : Regulator LP flag */ /* REGLPF : Regulator LP flag */
#define PWR_CSR_REGLPF (1 << 5) #define PWR_CSR_REGLPF (1 << 5)
/* VOSF: Voltage Scaling select flag */ /* VOSF: Voltage Scaling select flag */
#define PWR_CSR_VOSF (1 << 4) #define PWR_CSR_VOSF (1 << 4)
/* VREFINTRDYF: Internal voltage reference (VREFINT) ready flag */ /* VREFINTRDYF: Internal voltage reference (VREFINT) ready flag */
#define PWR_CSR_VREFINTRDYF (1 << 3) #define PWR_CSR_VREFINTRDYF (1 << 3)
/* --- Function prototypes ------------------------------------------------- */ /* --- Function prototypes ------------------------------------------------- */
typedef enum { typedef enum {

3
lib/stm32/l1/rcc.c
View File

@ -29,8 +29,7 @@
u32 rcc_ppre1_frequency = 2097000; u32 rcc_ppre1_frequency = 2097000;
u32 rcc_ppre2_frequency = 2097000; u32 rcc_ppre2_frequency = 2097000;
const clock_scale_t clock_vrange1_config[CLOCK_VRANGE1_END] = const clock_scale_t clock_vrange1_config[CLOCK_VRANGE1_END] ={
{
{ /* 24MHz PLL from HSI */ { /* 24MHz PLL from HSI */
.pll_source = RCC_CFGR_PLLSRC_HSI_CLK, .pll_source = RCC_CFGR_PLLSRC_HSI_CLK,
.pll_mul = RCC_CFGR_PLLMUL_MUL3, .pll_mul = RCC_CFGR_PLLMUL_MUL3,