From 4d7694b454a6a541851f54029dc3e07f98523534 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Thu, 22 Oct 2015 22:35:48 +0000 Subject: [PATCH] stm32f3: rcc: consistent masks for pll multiplier All other masks consistently used a separate mask/shift define, bring the pll multiplier function in line, and use the same form as other functions. --- include/libopencm3/stm32/f3/rcc.h | 2 +- lib/stm32/f3/rcc.c | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/include/libopencm3/stm32/f3/rcc.h b/include/libopencm3/stm32/f3/rcc.h index f299012c..df57854f 100644 --- a/include/libopencm3/stm32/f3/rcc.h +++ b/include/libopencm3/stm32/f3/rcc.h @@ -105,6 +105,7 @@ /* PLLMUL: PLL multiplication factor */ #define RCC_CFGR_PLLMUL_SHIFT 18 +#define RCC_CFGR_PLLMUL_MASK 0xF #define RCC_CFGR_PLLMUL_PLL_IN_CLK_X2 0x0 #define RCC_CFGR_PLLMUL_PLL_IN_CLK_X3 0x1 #define RCC_CFGR_PLLMUL_PLL_IN_CLK_X4 0x2 @@ -120,7 +121,6 @@ #define RCC_CFGR_PLLMUL_PLL_IN_CLK_X14 0xC #define RCC_CFGR_PLLMUL_PLL_IN_CLK_X15 0xD #define RCC_CFGR_PLLMUL_PLL_IN_CLK_X16 0xE -#define RCC_CFGR_PLLMUL_MASK (0xF << RCC_CFGR_PLLMUL_SHIFT) /* PPRE2: APB high-speed prescaler (APB2) */ #define RCC_CFGR_PPRE2_SHIFT 11 diff --git a/lib/stm32/f3/rcc.c b/lib/stm32/f3/rcc.c index 18de867b..df957599 100644 --- a/lib/stm32/f3/rcc.c +++ b/lib/stm32/f3/rcc.c @@ -368,8 +368,11 @@ void rcc_set_hpre(uint32_t hpre) void rcc_set_pll_multiplier(uint32_t pll) { - RCC_CFGR = (~RCC_CFGR_PLLMUL_MASK & RCC_CFGR) | - (pll << RCC_CFGR_PLLMUL_SHIFT); + uint32_t reg32; + + reg32 = RCC_CFGR; + reg32 &= ~(RCC_CFGR_PLLMUL_MASK << RCC_CFGR_PLLMUL_SHIFT); + RCC_CFGR = (reg32 | (pll << RCC_CFGR_PLLMUL_SHIFT)); }