Add initial flash memory register support.
Thanks Thomas Otto <tommi@viadmin.org> for the patch!
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@ -28,5 +28,6 @@
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#include <libopenstm32/adc.h>
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#include <libopenstm32/spi.h>
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#include <libopenstm32/timer.h>
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#include <libopenstm32/flash.h>
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#endif
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83
include/libopenstm32/flash.h
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83
include/libopenstm32/flash.h
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/*
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* This file is part of the libopenstm32 project.
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*
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* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENSTM32_FLASH_H
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#define LIBOPENSTM32_FLASH_H
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#include <libopenstm32.h>
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/* --- FLASH registers ----------------------------------------------------- */
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#define FLASH_ACR MMIO32(FLASH_BASE + 0x00)
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#define FLASH_KEYR MMIO32(FLASH_BASE + 0x04)
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#define FLASH_OPTKEYR MMIO32(FLASH_BASE + 0x08)
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#define FLASH_SR MMIO32(FLASH_BASE + 0x0C)
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#define FLASH_CR MMIO32(FLASH_BASE + 0x10)
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#define FLASH_AR MMIO32(FLASH_BASE + 0x14)
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#define FLASH_OBR MMIO32(FLASH_BASE + 0x1C)
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#define FLASH_WRPR MMIO32(FLASH_BASE + 0x20)
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define PRFTBS (1 << 5)
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#define PRFTBE (1 << 4)
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#define HLFCYA (1 << 3)
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#define LATENCY_0WS 0x00
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#define LATENCY_1WS 0x01
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#define LATENCY_2WS 0x02
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/* --- FLASH_SR values ----------------------------------------------------- */
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#define EOP (1 << 5)
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#define WRPRTERR (1 << 4)
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#define PGERR (1 << 2)
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#define BSY (1 << 0)
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/* --- FLASH_CR values ----------------------------------------------------- */
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#define EOPIE (1 << 12)
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#define ERRIE (1 << 10)
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#define OPTWRE (1 << 9)
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#define LOCK (1 << 7)
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#define STRT (1 << 6)
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#define OPTER (1 << 5)
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#define OPTPG (1 << 4)
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#define MER (1 << 2)
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#define PER (1 << 1)
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#define PG (1 << 0)
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/* --- FLASH_OBR values ---------------------------------------------------- */
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/* FLASH_OBR[25:18]: Data1 */
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/* FLASH_OBR[17:10]: Data0 */
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#define NRST_STDBY (1 << 4)
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#define NRST_STOP (1 << 3)
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#define WDG_SW (1 << 2)
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#define RDPRT (1 << 1)
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#define OPTERR (1 << 0)
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/* --- Function prototypes ------------------------------------------------- */
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void flash_prefetch_buffer_enable(void);
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void flash_prefetch_buffer_disable(void);
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void flash_halfcycle_enable(void);
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void flash_halfcycle_disable(void);
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void flash_set_ws(u32 ws);
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#endif
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50
lib/flash.c
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50
lib/flash.c
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@ -0,0 +1,50 @@
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/*
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* This file is part of the libopenstm32 project.
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*
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* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopenstm32.h>
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void flash_prefetch_buffer_enable(void)
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{
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FLASH_ACR |= PRFTBE;
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}
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void flash_prefetch_buffer_disable(void)
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{
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FLASH_ACR &= ~PRFTBE;
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}
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void flash_halfcycle_enable(void)
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{
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FLASH_ACR |= HLFCYA;
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}
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void flash_halfcycle_disable(void)
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{
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FLASH_ACR &= ~HLFCYA;
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}
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void flash_set_ws(u32 ws)
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{
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u32 reg32;
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reg32 = FLASH_ACR;
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reg32 &= ~((1 << 0) | (1 << 1) | (1 << 2));
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reg32 |= ws;
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FLASH_ACR = reg32;
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}
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