Add initial flash memory register support.

Thanks Thomas Otto <tommi@viadmin.org> for the patch!
This commit is contained in:
Uwe Hermann 2010-01-15 01:05:22 +01:00
parent 1b73ccdd7a
commit 4fdb7f08fd
3 changed files with 134 additions and 0 deletions

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@ -28,5 +28,6 @@
#include <libopenstm32/adc.h>
#include <libopenstm32/spi.h>
#include <libopenstm32/timer.h>
#include <libopenstm32/flash.h>
#endif

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/*
* This file is part of the libopenstm32 project.
*
* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LIBOPENSTM32_FLASH_H
#define LIBOPENSTM32_FLASH_H
#include <libopenstm32.h>
/* --- FLASH registers ----------------------------------------------------- */
#define FLASH_ACR MMIO32(FLASH_BASE + 0x00)
#define FLASH_KEYR MMIO32(FLASH_BASE + 0x04)
#define FLASH_OPTKEYR MMIO32(FLASH_BASE + 0x08)
#define FLASH_SR MMIO32(FLASH_BASE + 0x0C)
#define FLASH_CR MMIO32(FLASH_BASE + 0x10)
#define FLASH_AR MMIO32(FLASH_BASE + 0x14)
#define FLASH_OBR MMIO32(FLASH_BASE + 0x1C)
#define FLASH_WRPR MMIO32(FLASH_BASE + 0x20)
/* --- FLASH_ACR values ---------------------------------------------------- */
#define PRFTBS (1 << 5)
#define PRFTBE (1 << 4)
#define HLFCYA (1 << 3)
#define LATENCY_0WS 0x00
#define LATENCY_1WS 0x01
#define LATENCY_2WS 0x02
/* --- FLASH_SR values ----------------------------------------------------- */
#define EOP (1 << 5)
#define WRPRTERR (1 << 4)
#define PGERR (1 << 2)
#define BSY (1 << 0)
/* --- FLASH_CR values ----------------------------------------------------- */
#define EOPIE (1 << 12)
#define ERRIE (1 << 10)
#define OPTWRE (1 << 9)
#define LOCK (1 << 7)
#define STRT (1 << 6)
#define OPTER (1 << 5)
#define OPTPG (1 << 4)
#define MER (1 << 2)
#define PER (1 << 1)
#define PG (1 << 0)
/* --- FLASH_OBR values ---------------------------------------------------- */
/* FLASH_OBR[25:18]: Data1 */
/* FLASH_OBR[17:10]: Data0 */
#define NRST_STDBY (1 << 4)
#define NRST_STOP (1 << 3)
#define WDG_SW (1 << 2)
#define RDPRT (1 << 1)
#define OPTERR (1 << 0)
/* --- Function prototypes ------------------------------------------------- */
void flash_prefetch_buffer_enable(void);
void flash_prefetch_buffer_disable(void);
void flash_halfcycle_enable(void);
void flash_halfcycle_disable(void);
void flash_set_ws(u32 ws);
#endif

50
lib/flash.c Normal file
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/*
* This file is part of the libopenstm32 project.
*
* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopenstm32.h>
void flash_prefetch_buffer_enable(void)
{
FLASH_ACR |= PRFTBE;
}
void flash_prefetch_buffer_disable(void)
{
FLASH_ACR &= ~PRFTBE;
}
void flash_halfcycle_enable(void)
{
FLASH_ACR |= HLFCYA;
}
void flash_halfcycle_disable(void)
{
FLASH_ACR &= ~HLFCYA;
}
void flash_set_ws(u32 ws)
{
u32 reg32;
reg32 = FLASH_ACR;
reg32 &= ~((1 << 0) | (1 << 1) | (1 << 2));
reg32 |= ws;
FLASH_ACR = reg32;
}