From 4ff19fa2b4f531dbab65b8a647c8adaac31a207e Mon Sep 17 00:00:00 2001 From: BuFran Date: Thu, 11 Jul 2013 14:18:12 +0200 Subject: [PATCH] [Style] Unified commenting style on F0 --- include/libopencm3/stm32/f0/adc.h | 24 ++++++++++++--- include/libopencm3/stm32/f0/cec.h | 20 +++++++++++-- include/libopencm3/stm32/f0/comparator.h | 21 +++++++++++-- include/libopencm3/stm32/f0/crc.h | 24 +++++++++++++++ include/libopencm3/stm32/f0/dac.h | 20 +++++++++++-- include/libopencm3/stm32/f0/flash.h | 21 +++++++++++-- include/libopencm3/stm32/f0/gpio.h | 24 +++++++++++++++ include/libopencm3/stm32/f0/i2c.h | 21 +++++++++++-- include/libopencm3/stm32/f0/iwdg.h | 24 +++++++++++++-- include/libopencm3/stm32/f0/pwr.h | 24 +++++++++++++++ include/libopencm3/stm32/f0/rcc.h | 23 +++++++++++--- include/libopencm3/stm32/f0/spi.h | 20 +++++++++++-- include/libopencm3/stm32/f0/syscfg.h | 24 +++++++++++++-- include/libopencm3/stm32/f0/tsc.h | 38 +++++++++++++++++------- include/libopencm3/stm32/f0/usart.h | 25 ++++++++++++---- 15 files changed, 309 insertions(+), 44 deletions(-) diff --git a/include/libopencm3/stm32/f0/adc.h b/include/libopencm3/stm32/f0/adc.h index 4250aa55..c229f0bb 100644 --- a/include/libopencm3/stm32/f0/adc.h +++ b/include/libopencm3/stm32/f0/adc.h @@ -23,9 +23,15 @@ #include #include +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + #define ADC ADC_BASE -/* ADC Registers ------------------------------------------------------------*/ +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ /* ADC interrupt and status register */ #define ADC_ISR(base) MMIO32(base + 0x00) @@ -73,7 +79,9 @@ /* Regular Data Register */ #define ADC_CCR MMIO32(ADC_BASE + 0x308) -/* Register values ----------------------------------------------------------*/ +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ /* ADC_ISR Values -----------------------------------------------------------*/ @@ -178,15 +186,23 @@ #define ADC_DR_DATA 0xFFFF -/* ADC_CCR Values ------------------------------------------------------------*/ +/* ADC_CCR Values -----------------------------------------------------------*/ #define ADC_CCR_VBATEN (1 << 24) #define ADC_CCR_TSEN (1 << 23) #define ADC_CCR_VREFEN (1 << 22) +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ + + BEGIN_DECLS END_DECLS - #endif diff --git a/include/libopencm3/stm32/f0/cec.h b/include/libopencm3/stm32/f0/cec.h index 47b2da66..e5c27da3 100644 --- a/include/libopencm3/stm32/f0/cec.h +++ b/include/libopencm3/stm32/f0/cec.h @@ -23,9 +23,15 @@ #include #include +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + #define CEC CEC_BASE -/* CEC Registers ------------------------------------------------------------*/ +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ #define CEC_CR MMIO32(CEC_BASE + 0x00) #define CEC_CFGR MMIO32(CEC_BASE + 0x04) @@ -34,7 +40,9 @@ #define CEC_ISR MMIO32(CEC_BASE + 0x10) #define CEC_IER MMIO32(CEC_BASE + 0x14) -/* Register values ----------------------------------------------------------*/ +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ /* CEC_CR Values ------------------------------------------------------------*/ @@ -91,6 +99,14 @@ #define CEC_IER_RXENDIE (1 << 1) #define CEC_IER_RXBRIE (1 << 0) +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ + BEGIN_DECLS END_DECLS diff --git a/include/libopencm3/stm32/f0/comparator.h b/include/libopencm3/stm32/f0/comparator.h index a11fb372..60be4841 100644 --- a/include/libopencm3/stm32/f0/comparator.h +++ b/include/libopencm3/stm32/f0/comparator.h @@ -36,15 +36,24 @@ #include #include -/* USART Registers ----------------------------------------------------------*/ +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + #define COMP1 0 #define COMP2 1 +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ + #define COMP_CSR(i) MMIO16(SYSCFG_COMP_BASE + 0x1c + (i)*2) #define COMP_CSR1 COMP_CSR(COMP1) #define COMP_CSR2 COMP_CSR(COMP2) -/* Register values ----------------------------------------------------------*/ +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ /* COMP_CSR Values ----------------------------------------------------------*/ @@ -94,7 +103,13 @@ #define COMP_CSR_SW1 (1 << 1) #define COMP_CSR_EN (1 << 0) -/* API values ---------------------------------------------------------------*/ +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ BEGIN_DECLS diff --git a/include/libopencm3/stm32/f0/crc.h b/include/libopencm3/stm32/f0/crc.h index fc8cabac..b7b611b3 100644 --- a/include/libopencm3/stm32/f0/crc.h +++ b/include/libopencm3/stm32/f0/crc.h @@ -36,6 +36,18 @@ #include #include +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ + #define CRC_CR_REV_OUT (1 << 7) #define CRC_CR_REV_IN_SHIFT 5 #define CRC_CR_REV_IN (3 << CRC_CR_REV_IN_SHIFT) @@ -44,4 +56,16 @@ #define CRC_CR_REV_IN_HALF (2 << CRC_CR_REV_IN_SHIFT) #define CRC_CR_REV_IN_WORD (3 << CRC_CR_REV_IN_SHIFT) +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ + +BEGIN_DECLS + +END_DECLS + #endif diff --git a/include/libopencm3/stm32/f0/dac.h b/include/libopencm3/stm32/f0/dac.h index 14904554..d55150a4 100644 --- a/include/libopencm3/stm32/f0/dac.h +++ b/include/libopencm3/stm32/f0/dac.h @@ -23,9 +23,15 @@ #include #include +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + #define DAC DAC_BASE -/* DAC Registers ------------------------------------------------------------*/ +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ #define DAC_CR MMIO32(DAC_BASE + 0x00) #define DAC_SWTRIGR MMIO32(DAC_BASE + 0x04) @@ -36,7 +42,9 @@ #define DAC_SR MMIO32(DAC_BASE + 0x34) -/* Register values ----------------------------------------------------------*/ +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ /* DAC_CR Values ------------------------------------------------------------*/ @@ -82,10 +90,16 @@ #define DAC_SR_DMAUDR1 (1 << 13) +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ BEGIN_DECLS END_DECLS - #endif diff --git a/include/libopencm3/stm32/f0/flash.h b/include/libopencm3/stm32/f0/flash.h index a75bedb7..fc524d46 100644 --- a/include/libopencm3/stm32/f0/flash.h +++ b/include/libopencm3/stm32/f0/flash.h @@ -23,7 +23,14 @@ #include #include -/* --- FLASH registers ----------------------------------------------------- */ +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + + +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ #define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00) #define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04) @@ -34,6 +41,10 @@ #define FLASH_OBR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x1C) #define FLASH_WRPR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20) +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ + /* --- FLASH_ACR values ---------------------------------------------------- */ #define FLASH_ACR_PRFTBS (1 << 5) @@ -88,7 +99,9 @@ #define FLASH_OBR_OPTERR (1 << 0) -/* --- FLASH Keys -----------------------------------------------------------*/ +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ #define FLASH_RDP_L0 ((uint8_t)0xaa) #define FLASH_RDP_L1 ((uint8_t)0xf0) /* any value */ @@ -96,7 +109,9 @@ #define FLASH_KEYR_KEY1 ((uint32_t)0x45670123) #define FLASH_KEYR_KEY2 ((uint32_t)0xcdef89ab) -/* --- Function prototypes ------------------------------------------------- */ +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ BEGIN_DECLS diff --git a/include/libopencm3/stm32/f0/gpio.h b/include/libopencm3/stm32/f0/gpio.h index c6221a5f..5a33ecd3 100644 --- a/include/libopencm3/stm32/f0/gpio.h +++ b/include/libopencm3/stm32/f0/gpio.h @@ -34,6 +34,14 @@ #include #include +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ + #define GPIO_BRR(port) MMIO32(port + 0x24) #define GPIOA_BRR GPIO_BRR(GPIOA) #define GPIOB_BRR GPIO_BRR(GPIOB) @@ -41,6 +49,10 @@ #define GPIOD_BRR GPIO_BRR(GPIOD) #define GPIOF_BRR GPIO_BRR(GPIOF) +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ + /** @defgroup gpio_speed GPIO Output Pin Speed @ingroup gpio_defines @{*/ @@ -49,4 +61,16 @@ #define GPIO_OSPEED_HIGH 0x3 /**@}*/ +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ + +BEGIN_DECLS + +END_DECLS + #endif diff --git a/include/libopencm3/stm32/f0/i2c.h b/include/libopencm3/stm32/f0/i2c.h index d81c0edd..983dc5b1 100644 --- a/include/libopencm3/stm32/f0/i2c.h +++ b/include/libopencm3/stm32/f0/i2c.h @@ -22,10 +22,16 @@ #include +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + #define I2C1 I2C1_BASE #define I2C2 I2C2_BASE -/* I2C Registers ------------------------------------------------------------*/ +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ #define I2C_CR1(i2c_base) MMIO32(i2c_base + 0x00) #define I2C1_CR1 I2C_CR1(I2C1) @@ -71,6 +77,10 @@ #define I2C1_TXDR I2C_TXDR(I2C1) #define I2C2_TXDR I2C_TXDR(I2C2) +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ + /* I2C_CR1 values ---------------------------------------------------------- */ #define I2C_CR1_PECEN (1 << 23) @@ -221,8 +231,15 @@ #define I2C_ICR_NACKCF (1 << 4) #define I2C_ICR_ADDRCF (1 << 3) -BEGIN_DECLS +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ + +BEGIN_DECLS END_DECLS diff --git a/include/libopencm3/stm32/f0/iwdg.h b/include/libopencm3/stm32/f0/iwdg.h index f0d76655..7ac90927 100644 --- a/include/libopencm3/stm32/f0/iwdg.h +++ b/include/libopencm3/stm32/f0/iwdg.h @@ -36,16 +36,36 @@ #include #include -/* --- IWDG registers ------------------------------------------------------ */ +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ /* Key Register (IWDG_WINR) */ #define IWDG_WINR MMIO32(IWDG_BASE + 0x10) +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ + /* --- IWDG_SR values ------------------------------------------------------ */ /* WVU: Watchdog counter window value update */ #define IWDG_SR_WVU (1 << 2) +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ + +BEGIN_DECLS + +END_DECLS #endif - diff --git a/include/libopencm3/stm32/f0/pwr.h b/include/libopencm3/stm32/f0/pwr.h index ee1ac9fb..f880c2dd 100644 --- a/include/libopencm3/stm32/f0/pwr.h +++ b/include/libopencm3/stm32/f0/pwr.h @@ -34,11 +34,35 @@ #include #include +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ + /* EWUP: Enable WKUP2 pin */ #define PWR_CSR_EWUP2 (1 << 9) /* EWUP: Enable WKUP1 pin */ #define PWR_CSR_EWUP1 (1 << 8) +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ + +BEGIN_DECLS + +END_DECLS + #endif diff --git a/include/libopencm3/stm32/f0/rcc.h b/include/libopencm3/stm32/f0/rcc.h index 2f3e9a31..306621f8 100644 --- a/include/libopencm3/stm32/f0/rcc.h +++ b/include/libopencm3/stm32/f0/rcc.h @@ -36,7 +36,13 @@ #include #include -/* --- RCC registers ------------------------------------------------------- */ +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ #define RCC_CR MMIO32(RCC_BASE + 0x00) #define RCC_CFGR MMIO32(RCC_BASE + 0x04) @@ -53,6 +59,10 @@ #define RCC_CFGR3 MMIO32(RCC_BASE + 0x30) #define RCC_CR2 MMIO32(RCC_BASE + 0x32) +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ + /* --- RCC_CR values ------------------------------------------------------- */ #define RCC_CR_PLLRDY (1 << 25) @@ -324,13 +334,14 @@ #define RCC_CR2_HSI14RDY (1 << 1) #define RCC_CR2_HSI14ON (1 << 0) +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ + /* --- Variable definitions ------------------------------------------------ */ extern uint32_t rcc_core_frequency; extern uint32_t rcc_ppre_frequency; - -/* --- Function prototypes ------------------------------------------------- */ - enum rcc_osc { HSI14, HSI, HSE, PLL, LSI, LSE }; @@ -418,6 +429,10 @@ enum rcc_periph_rst { }; #undef _REG_BIT +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ + BEGIN_DECLS void rcc_osc_ready_int_clear(enum rcc_osc osc); diff --git a/include/libopencm3/stm32/f0/spi.h b/include/libopencm3/stm32/f0/spi.h index 96fec1e9..3312b332 100644 --- a/include/libopencm3/stm32/f0/spi.h +++ b/include/libopencm3/stm32/f0/spi.h @@ -34,11 +34,21 @@ #include #include +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + #define SPI1_BASE SPI1_I2S1_BASE +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ /* DFF: Data frame format */ -/****************************************************************************/ /** @defgroup spi_dff SPI data frame format * @ingroup spi_defines * @@ -93,7 +103,13 @@ #define SPI_SR_FRLVL_HALF_FIFO (0x2 << 9) #define SPI_SR_FRLVL_FIFO_FULL (0x3 << 9) -/* --- Function prototypes ------------------------------------------------- */ +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ BEGIN_DECLS diff --git a/include/libopencm3/stm32/f0/syscfg.h b/include/libopencm3/stm32/f0/syscfg.h index 3b79d9a0..d91cd7d8 100644 --- a/include/libopencm3/stm32/f0/syscfg.h +++ b/include/libopencm3/stm32/f0/syscfg.h @@ -23,7 +23,13 @@ #include #include -/* --- SYSCFG registers ---------------------------------------------------- */ +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ #define SYSCFG_CFGR1 MMIO32(SYSCFG_COMP_BASE + 0x00) #define SYSCFG_EXTICR(i) MMIO32(SYSCFG_COMP_BASE + 0x08 + (i)*4) @@ -33,7 +39,9 @@ #define SYSCFG_EXTICR4 SYSCFG_EXTICR(3) #define SYSCFG_CFGR2 MMIO32(SYSCFG_COMP_BASE + 0x18) -/* Register values ----------------------------------------------------------*/ +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ /* SYSCFG_CFGR1 Values -- ---------------------------------------------------*/ @@ -57,6 +65,8 @@ #define SYSCFG_CFGR1_I2C_PA9_FMPLUS (1 << 22) #define SYSCFG_CFGR1_I2C_PA10_FMPLUS (1 << 23) +/* SYSCFG_EXTICR Values -- --------------------------------------------------*/ + #define SYSCFG_EXTICR_SKIP 4 #define SYSCFG_EXTICR_GPIOA 0 #define SYSCFG_EXTICR_GPIOB 1 @@ -64,12 +74,20 @@ #define SYSCFG_EXTICR_GPIOD 3 #define SYSCFG_EXTICR_GPIOF 5 +/* SYSCFG_CFGR2 Values -- ---------------------------------------------------*/ + #define SYSCFG_CFGR2_LOCKUP_LOCK (1 << 0) #define SYSCFG_CFGR2_SRAM_PARITY_LOCK (1 << 1) #define SYSCFG_CFGR2_PVD_LOCK (1 << 2) #define SYSCFG_CFGR2_SRAM_PEF (1 << 8) -/* API values ---------------------------------------------------------------*/ +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ BEGIN_DECLS diff --git a/include/libopencm3/stm32/f0/tsc.h b/include/libopencm3/stm32/f0/tsc.h index 419ac778..c689966c 100644 --- a/include/libopencm3/stm32/f0/tsc.h +++ b/include/libopencm3/stm32/f0/tsc.h @@ -23,9 +23,15 @@ #include #include +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + #define TSC TSC_BASE -/* TSC Registers -----------------------------------------------------------*/ +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ #define TSC_CR MMIO32(TSC_BASE + 0x00) #define TSC_IER MMIO32(TSC_BASE + 0x04) @@ -38,9 +44,11 @@ #define TSC_IOGCSR MMIO32(TSC_BASE + 0x30) #define TSC_IOGxCR(x) MMIO8(TSC_BASE + 0x34 + (x)*4) -/* Register values ---------------------------------------------------------*/ +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ -/* TSC_CR Values -----------------------------------------------------------*/ +/* TSC_CR Values ------------------------------------------------------------*/ #define TSC_CR_CTPH_SHIFT 28 #define TSC_CR_CTPH (0xF << TSC_CR_CTPH_SHIFT) @@ -66,22 +74,22 @@ #define TSC_CR_START (1 << 1) #define TSC_CR_TSCE (1 << 0) -/* TSC_IER Values ----------------------------------------------------------*/ +/* TSC_IER Values -----------------------------------------------------------*/ #define TSC_IER_MCEIE (1 << 1) #define TSC_IER_EOAIE (1 << 0) -/* TSC_ICR Values ----------------------------------------------------------*/ +/* TSC_ICR Values -----------------------------------------------------------*/ #define TSC_ICR_MCEIC (1 << 1) #define TSC_ICR_EOAIC (1 << 0) -/* TSC_ISR Values ----------------------------------------------------------*/ +/* TSC_ISR Values -----------------------------------------------------------*/ #define TSC_ISR_MCEF (1 << 1) #define TSC_ISR_EOAF (1 << 0) -/* TSC_IOHCR Values --------------------------------------------------------*/ +/* TSC_IOHCR Values ---------------------------------------------------------*/ /* Bit helper g = [1..6] io = [1..4] */ #define TSC_IOBIT_VAL(g, io) ((1 << ((io)-1)) << (((g)-1)*4)) @@ -93,7 +101,7 @@ #define TSC_IOHCR_G5(io) TSC_IOBIT_VAL(5, io) #define TSC_IOHCR_G6(io) TSC_IOBIT_VAL(6, io) -/* TSC_IOASCR Values -------------------------------------------------------*/ +/* TSC_IOASCR Values --------------------------------------------------------*/ #define TSC_IOASCR_G1(io) TSC_IOBIT_VAL(1, io) #define TSC_IOASCR_G2(io) TSC_IOBIT_VAL(2, io) @@ -102,7 +110,7 @@ #define TSC_IOASCR_G5(io) TSC_IOBIT_VAL(5, io) #define TSC_IOASCR_G6(io) TSC_IOBIT_VAL(6, io) -/* TSC_IOSCR Values --------------------------------------------------------*/ +/* TSC_IOSCR Values ---------------------------------------------------------*/ #define TSC_IOSCR_G1(io) TSC_IOBIT_VAL(1, io) #define TSC_IOSCR_G2(io) TSC_IOBIT_VAL(2, io) @@ -111,7 +119,7 @@ #define TSC_IOSCR_G5(io) TSC_IOBIT_VAL(5, io) #define TSC_IOSCR_G6(io) TSC_IOBIT_VAL(6, io) -/* TSC_IOCCR Values -------------------------------------------------------*/ +/* TSC_IOCCR Values ---------------------------------------------------------*/ #define TSC_IOCCR_G1(io) TSC_IOBIT_VAL(1, io) #define TSC_IOCCR_G2(io) TSC_IOBIT_VAL(2, io) @@ -120,11 +128,19 @@ #define TSC_IOCCR_G5(io) TSC_IOBIT_VAL(5, io) #define TSC_IOCCR_G6(io) TSC_IOBIT_VAL(6, io) -/* TSC_IOGCSR Values -------------------------------------------------------*/ +/* TSC_IOGCSR Values --------------------------------------------------------*/ #define TSC_IOGCSR_GxE(x) (1 << ((x)-1)) #define TSC_IOGCSR_GxS(x) (1 << ((x)+15)) +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ + +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ + BEGIN_DECLS END_DECLS diff --git a/include/libopencm3/stm32/f0/usart.h b/include/libopencm3/stm32/f0/usart.h index 4efb869d..9d3a5905 100644 --- a/include/libopencm3/stm32/f0/usart.h +++ b/include/libopencm3/stm32/f0/usart.h @@ -34,10 +34,16 @@ #include #include +/*****************************************************************************/ +/* Module definitions */ +/*****************************************************************************/ + #define USART1 USART1_BASE #define USART2 USART2_BASE -/* USART Registers ----------------------------------------------------------*/ +/*****************************************************************************/ +/* Register definitions */ +/*****************************************************************************/ #define USART_CR1(usart_base) MMIO32(usart_base + 0x00) #define USART1_CR1 USART_CR1(USART1_BASE) @@ -83,7 +89,9 @@ #define USART1_TDR USART_TDR(USART1_BASE) #define USART2_TDR USART_TDR(USART2_BASE) -/* Register values ----------------------------------------------------------*/ +/*****************************************************************************/ +/* Register values */ +/*****************************************************************************/ /* USART_CR1 Values ---------------------------------------------------------*/ @@ -251,6 +259,9 @@ #define USART_ICR_FECF (1 << 1) #define USART_ICR_PECF (1 << 0) +/*****************************************************************************/ +/* API definitions */ +/*****************************************************************************/ #define USART_PARITY (USART_CR1_PCE | USART_CR1_PS) #define USART_PARITY_NONE (0) @@ -264,11 +275,15 @@ #define USART_MODE_TX_RX (USART_CR1_TE | USART_CR1_RE) #define USART_FLOWCONTROL (USART_CR3_RTSE | USART_CR3_CTSE) -#define USART_FLOWCONTROL_NONE (0) -#define USART_FLOWCONTROL_RTS (USART_CR3_RTSE) -#define USART_FLOWCONTROL_CTS (USART_CR3_CTSE) +#define USART_FLOWCONTROL_NONE (0) +#define USART_FLOWCONTROL_RTS (USART_CR3_RTSE) +#define USART_FLOWCONTROL_CTS (USART_CR3_CTSE) #define USART_FLOWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) +/*****************************************************************************/ +/* API Functions */ +/*****************************************************************************/ + BEGIN_DECLS void usart_set_baudrate(uint32_t usart, uint32_t baud);