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stm32: adc-v2: pull up overrun and EOC flag methods

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EOS vs EOSEQ is really a single/multi variant difference, so leave it out.
This commit is contained in:
Karl Palsson 2015-11-08 18:25:05 +00:00
parent b2af9e632c
commit 5063ea0db7
6 changed files with 72 additions and 178 deletions
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6
include/libopencm3/stm32/common/adc_common_v2.h
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@ -192,6 +192,12 @@ void adc_enable_dma(uint32_t adc);
void adc_disable_dma(uint32_t adc); void adc_disable_dma(uint32_t adc);
bool adc_eoc(uint32_t adc); bool adc_eoc(uint32_t adc);
bool adc_eos(uint32_t adc); bool adc_eos(uint32_t adc);
void adc_enable_eoc_interrupt(uint32_t adc);
void adc_disable_eoc_interrupt(uint32_t adc);
void adc_enable_overrun_interrupt(uint32_t adc);
void adc_disable_overrun_interrupt(uint32_t adc);
bool adc_get_overrun_flag(uint32_t adc);
void adc_clear_overrun_flag(uint32_t adc);
uint32_t adc_read_regular(uint32_t adc); uint32_t adc_read_regular(uint32_t adc);
END_DECLS END_DECLS

6
include/libopencm3/stm32/f0/adc.h
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@ -174,15 +174,9 @@ void adc_enable_watchdog_interrupt(uint32_t adc);
void adc_disable_watchdog_interrupt(uint32_t adc); void adc_disable_watchdog_interrupt(uint32_t adc);
bool adc_get_watchdog_flag(uint32_t adc); bool adc_get_watchdog_flag(uint32_t adc);
void adc_clear_watchdog_flag(uint32_t adc); void adc_clear_watchdog_flag(uint32_t adc);
void adc_enable_overrun_interrupt(uint32_t adc);
void adc_disable_overrun_interrupt(uint32_t adc);
bool adc_get_overrun_flag(uint32_t adc);
void adc_clear_overrun_flag(uint32_t adc);
void adc_enable_eoc_sequence_interrupt(uint32_t adc); void adc_enable_eoc_sequence_interrupt(uint32_t adc);
void adc_disable_eoc_sequence_interrupt(uint32_t adc); void adc_disable_eoc_sequence_interrupt(uint32_t adc);
bool adc_get_eoc_sequence_flag(uint32_t adc); bool adc_get_eoc_sequence_flag(uint32_t adc);
void adc_enable_eoc_interrupt(uint32_t adc);
void adc_disable_eoc_interrupt(uint32_t adc);
/* Basic configuration */ /* Basic configuration */
void adc_set_clk_source(uint32_t adc, uint32_t source); void adc_set_clk_source(uint32_t adc, uint32_t source);

6
include/libopencm3/stm32/f3/adc.h
View File

@ -595,8 +595,6 @@ void adc_enable_eos_interrupt_injected(uint32_t adc);
void adc_disable_eos_interrupt_injected(uint32_t adc); void adc_disable_eos_interrupt_injected(uint32_t adc);
void adc_enable_all_awd_interrupt(uint32_t adc); void adc_enable_all_awd_interrupt(uint32_t adc);
void adc_disable_all_awd_interrupt(uint32_t adc); void adc_disable_all_awd_interrupt(uint32_t adc);
void adc_enable_eoc_interrupt(uint32_t adc);
void adc_disable_eoc_interrupt(uint32_t adc);
void adc_enable_eos_interrupt(uint32_t adc); void adc_enable_eos_interrupt(uint32_t adc);
void adc_disable_eos_interrupt(uint32_t adc); void adc_disable_eos_interrupt(uint32_t adc);
void adc_start_conversion_regular(uint32_t adc); void adc_start_conversion_regular(uint32_t adc);
@ -620,10 +618,6 @@ void adc_enable_external_trigger_regular(uint32_t adc, uint32_t trigger,
uint32_t polarity); uint32_t polarity);
void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger, void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger,
uint32_t polarity); uint32_t polarity);
void adc_enable_overrun_interrupt(uint32_t adc);
void adc_disable_overrun_interrupt(uint32_t adc);
bool adc_get_overrun_flag(uint32_t adc);
void adc_clear_overrun_flag(uint32_t adc);
bool adc_awd(uint32_t adc); bool adc_awd(uint32_t adc);
/*void adc_set_dma_continue(uint32_t adc);*/ /*void adc_set_dma_continue(uint32_t adc);*/
/*void adc_set_dma_terminate(uint32_t adc);*/ /*void adc_set_dma_terminate(uint32_t adc);*/

66
lib/stm32/common/adc_common_v2.c
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@ -216,6 +216,72 @@ void adc_disable_dma(uint32_t adc)
ADC_CFGR1(adc) &= ~ADC_CFGR1_DMAEN; ADC_CFGR1(adc) &= ~ADC_CFGR1_DMAEN;
} }
/** @brief ADC Enable the Overrun Interrupt
*
* The overrun interrupt is generated when data is not read from a result
* register before the next conversion is written. If DMA is enabled, all
* transfers are terminated and any conversion sequence is aborted.
*
* @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
*/
void adc_enable_overrun_interrupt(uint32_t adc)
{
ADC_IER(adc) |= ADC_IER_OVRIE;
}
/** @brief ADC Disable the Overrun Interrupt
*
* @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
*/
void adc_disable_overrun_interrupt(uint32_t adc)
{
ADC_IER(adc) &= ~ADC_IER_OVRIE;
}
/** @brief ADC Read the Overrun Flag
*
* The overrun flag is set when data is not read from a result register before
* the next conversion is written. If DMA is enabled, all transfers are
* terminated and any conversion sequence is aborted.
*
* @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
*/
bool adc_get_overrun_flag(uint32_t adc)
{
return ADC_ISR(adc) & ADC_ISR_OVR;
}
/** @brief ADC Clear Overrun Flags
*
* The overrun flag is cleared. Note that if an overrun occurs, DMA is
* terminated.
* The flag must be cleared and the DMA stream and ADC reinitialised to resume
* conversions (see the reference manual).
*
* @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
*/
void adc_clear_overrun_flag(uint32_t adc)
{
ADC_ISR(adc) = ADC_ISR_OVR;
}
/** @brief ADC Enable Regular End-Of-Conversion Interrupt
*
* @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
*/
void adc_enable_eoc_interrupt(uint32_t adc)
{
ADC_IER(adc) |= ADC_IER_EOCIE;
}
/** @brief ADC Disable Regular End-Of-Conversion Interrupt
*
* @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
*/
void adc_disable_eoc_interrupt(uint32_t adc)
{
ADC_IER(adc) &= ~ADC_IER_EOCIE;
}
/** @brief ADC Read from the Regular Conversion Result Register /** @brief ADC Read from the Regular Conversion Result Register
* *

78
lib/stm32/f0/adc.c
View File

@ -277,63 +277,6 @@ void adc_clear_watchdog_flag(uint32_t adc)
ADC_ISR(adc) = ADC_ISR_AWD1; ADC_ISR(adc) = ADC_ISR_AWD1;
} }
/*---------------------------------------------------------------------------*/
/** @brief ADC Enable the Overrun Interrupt
*
* The overrun interrupt is generated when data is not read from a result
* register before the next conversion is written. If DMA is enabled, all
* transfers are terminated and any conversion sequence is aborted.
*
* @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
*/
void adc_enable_overrun_interrupt(uint32_t adc)
{
ADC_IER(adc) |= ADC_IER_OVRIE;
}
/*---------------------------------------------------------------------------*/
/** @brief ADC Disable the Overrun Interrupt
*
* @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
*/
void adc_disable_overrun_interrupt(uint32_t adc)
{
ADC_IER(adc) &= ~ADC_IER_OVRIE;
}
/*---------------------------------------------------------------------------*/
/** @brief ADC Read the Overrun Flag
*
* The overrun flag is set when data is not read from a result register before
* the next conversion is written. If DMA is enabled, all transfers are
* terminated and any conversion sequence is aborted.
*
* @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
*/
bool adc_get_overrun_flag(uint32_t adc)
{
return ADC_ISR(adc) & ADC_ISR_OVR;
}
/*---------------------------------------------------------------------------*/
/** @brief ADC Clear Overrun Flags
*
* The overrun flag is cleared. Note that if an overrun occurs, DMA is
* terminated.
* The flag must be cleared and the DMA stream and ADC reinitialised to resume
* conversions (see the reference manual).
*
* @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
*/
void adc_clear_overrun_flag(uint32_t adc)
{
ADC_ISR(adc) = ADC_ISR_OVR;
}
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
/** @brief ADC Enable Regular End-Of-Conversion Sequence Interrupt /** @brief ADC Enable Regular End-Of-Conversion Sequence Interrupt
* *
@ -367,27 +310,6 @@ bool adc_get_eoc_sequence_flag(uint32_t adc)
return ADC_ISR(adc) & ADC_ISR_EOSEQ; return ADC_ISR(adc) & ADC_ISR_EOSEQ;
} }
/*---------------------------------------------------------------------------*/
/** @brief ADC Enable Regular End-Of-Conversion Interrupt
*
* @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
*/
void adc_enable_eoc_interrupt(uint32_t adc)
{
ADC_IER(adc) |= ADC_IER_EOCIE;
}
/*---------------------------------------------------------------------------*/
/** @brief ADC Disable Regular End-Of-Conversion Interrupt
*
* @param[in] adc Unsigned int32. ADC base address (@ref adc_reg_base)
*/
void adc_disable_eoc_interrupt(uint32_t adc)
{
ADC_IER(adc) &= ~ADC_IER_EOCIE;
}
/**@}*/ /**@}*/

88
lib/stm32/f3/adc.c
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@ -405,30 +405,6 @@ void adc_disable_all_awd_interrupt(uint32_t adc)
ADC_IER(adc) &= ~ADC_IER_AWD3IE; ADC_IER(adc) &= ~ADC_IER_AWD3IE;
} }
/*---------------------------------------------------------------------------*/
/** @brief ADC Enable Regular End-Of-Conversion Interrupt
*
* @param[in] adc Unsigned int32. ADC block register address base @ref
* adc_reg_base
*/
void adc_enable_eoc_interrupt(uint32_t adc)
{
ADC_IER(adc) |= ADC_IER_EOCIE;
}
/*---------------------------------------------------------------------------*/
/** @brief ADC Disable Regular End-Of-Conversion Interrupt
*
* @param[in] adc Unsigned int32. ADC block register address base @ref
* adc_reg_base
*/
void adc_disable_eoc_interrupt(uint32_t adc)
{
ADC_IER(adc) &= ~ADC_IER_EOCIE;
}
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
/** @brief ADC Enable Regular End-Of-Sequence Interrupt /** @brief ADC Enable Regular End-Of-Sequence Interrupt
* *
@ -869,70 +845,6 @@ void adc_disable_external_trigger_injected(uint32_t adc)
ADC_JSQR(adc) &= ~ADC_JSQR_JEXTEN_MASK; ADC_JSQR(adc) &= ~ADC_JSQR_JEXTEN_MASK;
} }
/*---------------------------------------------------------------------------*/
/** @brief ADC Enable the Overrun Interrupt
*
* The overrun interrupt is generated when data is not read from a result
* register before the next conversion is written. If DMA is enabled, all
* transfers are terminated and any conversion sequence is aborted.
*
* @param[in] adc Unsigned int32. ADC block register address base @ref
* adc_reg_base
*/
void adc_enable_overrun_interrupt(uint32_t adc)
{
ADC_IER(adc) |= ADC_IER_OVRIE;
}
/*---------------------------------------------------------------------------*/
/** @brief ADC Disable the Overrun Interrupt
*
* @param[in] adc Unsigned int32. ADC block register address base @ref
* adc_reg_base
*/
void adc_disable_overrun_interrupt(uint32_t adc)
{
ADC_IER(adc) &= ~ADC_IER_OVRIE;
}
/*---------------------------------------------------------------------------*/
/** @brief ADC Read the Overrun Flag
*
* The overrun flag is set when data is not read from a result register before
* the next conversion is written. If DMA is enabled, all transfers are
* terminated and any conversion sequence is aborted.
*
* @param[in] adc Unsigned int32. ADC block register address base @ref
* adc_reg_base
* @returns Unsigned int32 conversion result.
*/
bool adc_get_overrun_flag(uint32_t adc)
{
return ADC_ISR(adc) & ADC_ISR_OVR;
}
/*---------------------------------------------------------------------------*/
/** @brief ADC Clear Overrun Flags
*
* The overrun flag is cleared. Note that if an overrun occurs, DMA is
* terminated.
* The flag must be cleared and the DMA stream and ADC reinitialised to resume
* conversions (see the reference manual).
*
* @param[in] adc Unsigned int32. ADC block register address base
* @ref adc_reg_base
* @returns Unsigned int32 conversion result.
*/
void adc_clear_overrun_flag(uint32_t adc)
{
/* r_w1 bit */
ADC_ISR(adc) |= ADC_ISR_OVR;
}
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
/** @brief ADC Set DMA to Continue /** @brief ADC Set DMA to Continue
* *