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[stm32f3] Fix USART1 memory base address

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Thanks to Uwe Bonnes on the mailing list.

Confirmed in the f37x and f30 ref manuals
This commit is contained in:
Karl Palsson 2013-12-04 22:20:40 +00:00
parent 6570f6eb07
commit 50daf0ef1e
1 changed files with 1 additions and 1 deletions
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2
include/libopencm3/stm32/f3/memorymap.h
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@ -72,7 +72,7 @@
#define TIM16_BASE (PERIPH_BASE_APB2 + 0x4400) #define TIM16_BASE (PERIPH_BASE_APB2 + 0x4400)
#define TIM15_BASE (PERIPH_BASE_APB2 + 0x4000) #define TIM15_BASE (PERIPH_BASE_APB2 + 0x4000)
/* PERIPH_BASE_APB2 + 0x3C00 (0x4001 3C00 - 0x4001 3FFF): Reserved */ /* PERIPH_BASE_APB2 + 0x3C00 (0x4001 3C00 - 0x4001 3FFF): Reserved */
#define USART1_BASE (PERIPH_BASE_APB2 + 0x1000) #define USART1_BASE (PERIPH_BASE_APB2 + 0x3800)
#define TIM8_BASE (PERIPH_BASE_APB2 + 0x3400) #define TIM8_BASE (PERIPH_BASE_APB2 + 0x3400)
#define SPI1_BASE (PERIPH_BASE_APB2 + 0x3000) #define SPI1_BASE (PERIPH_BASE_APB2 + 0x3000)
#define TIM1_BASE (PERIPH_BASE_APB2 + 0x2C00) #define TIM1_BASE (PERIPH_BASE_APB2 + 0x2C00)