stm32l1: lcd: Define all LCD registers
Define minimal susbet of necessary functions for work with LCD screen.
This commit is contained in:
Nikolay Merinov
Karl Palsson
parent
14f1ac4764
commit
553a14f21d
216
include/libopencm3/stm32/l1/lcd.h
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216
include/libopencm3/stm32/l1/lcd.h
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/** @defgroup lcd_defines LCD Defines
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*
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* @ingroup STM32L1xx_defines
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*
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* @brief Defined Constants and Types for the STM32L1xx LCD Controller
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*
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* @version 1.0.0
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*
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* @author @htmlonly © @endhtmlonly 2014
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* Nikolay Merinov <nikolay.merinov@member.fsf.org>
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*
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* @date 2 March 2014
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*
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* LGPL License Terms @ref lgpl_license
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* */
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#ifndef LIBOPENCM3_LCD_H
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#define LIBOPENCM3_LCD_H
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#include <libopencm3/stm32/memorymap.h>
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#include <libopencm3/cm3/common.h>
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/* --- LCD registers ------------------------------------------------------ */
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/****************************************************************************/
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/** @defgroup lcd_reg_base LCD register base addresses
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@ingroup lcd_defines
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*/
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/* @{ */
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/* Control register */
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#define LCD_CR MMIO32(LCD_BASE + 0x00)
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/* Frame control register */
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#define LCD_FCR MMIO32(LCD_BASE + 0x04)
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/* Status register */
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#define LCD_SR MMIO32(LCD_BASE + 0x08)
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/* Clear register */
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#define LCD_CLR MMIO32(LCD_BASE + 0x0C)
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/* @} */
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/* --- LCD display memory ------------------------------------------------- */
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/* Base address of display memory */
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#define LCD_RAM_BASE (LCD_BASE + 0x14)
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/* COM0 memory */
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#define LCD_RAM_COM0 MMIO64(LCD_RAM_BASE + 0x00)
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/* COM1 memory */
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#define LCD_RAM_COM1 MMIO64(LCD_RAM_BASE + 0x08)
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/* COM2 memory */
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#define LCD_RAM_COM2 MMIO64(LCD_RAM_BASE + 0x10)
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/* COM3 memory */
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#define LCD_RAM_COM3 MMIO64(LCD_RAM_BASE + 0x18)
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/* COM4 memory */
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#define LCD_RAM_COM4 MMIO64(LCD_RAM_BASE + 0x20)
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/* COM5 memory */
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#define LCD_RAM_COM5 MMIO64(LCD_RAM_BASE + 0x28)
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/* COM6 memory */
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#define LCD_RAM_COM6 MMIO64(LCD_RAM_BASE + 0x30)
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/* COM7 memory */
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#define LCD_RAM_COM7 MMIO64(LCD_RAM_BASE + 0x38)
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/* --- LCD_CR values ------------------------------------------------------ */
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#define LCD_CR_LCDEN (1 << 0)
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#define LCD_CR_VSEL (1 << 1)
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#define LCD_CR_DUTY_SHIFT 2
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#define LCD_CR_DUTY_MASK 0x7
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#define LCD_CR_DUTY_STATIC 0x0
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#define LCD_CR_DUTY_1_2 0x1
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#define LCD_CR_DUTY_1_3 0x2
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#define LCD_CR_DUTY_1_4 0x3
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#define LCD_CR_DUTY_1_8 0x4
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#define LCD_CR_BIAS_SHIFT 5
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#define LCD_CR_BIAS_MASK 0x3
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#define LCD_CR_BIAS_1_4 0x0
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#define LCD_CR_BIAS_1_2 0x1
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#define LCD_CR_BIAS_1_3 0x2
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#define LCD_CR_MUX_SEG (1 << 7)
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/* --- LCD_FCR values ------------------------------------------------------ */
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#define LCD_FCR_HD (1 << 0)
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#define LCD_FCR_SOFIE (1 << 1)
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#define LCD_FCR_UDDIE (1 << 3)
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#define LCD_FCR_PON_SHIFT 4
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#define LCD_FCR_PON_MASK 0x7
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#define LCD_FCR_PON_0 0x0
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#define LCD_FCR_PON_1 0x1
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#define LCD_FCR_PON_2 0x2
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#define LCD_FCR_PON_3 0x3
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#define LCD_FCR_PON_4 0x4
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#define LCD_FCR_PON_5 0x5
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#define LCD_FCR_PON_6 0x6
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#define LCD_FCR_PON_7 0x7
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#define LCD_FCR_DEAD_SHIFT 7
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#define LCD_FCR_DEAD_MASK 0x7
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#define LCD_FCR_DEAD_NONE 0x0
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#define LCD_FCR_DEAD_1_PHASE 0x1
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#define LCD_FCR_DEAD_2_PHASE 0x2
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#define LCD_FCR_DEAD_3_PHASE 0x3
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#define LCD_FCR_DEAD_4_PHASE 0x4
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#define LCD_FCR_DEAD_5_PHASE 0x5
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#define LCD_FCR_DEAD_6_PHASE 0x6
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#define LCD_FCR_DEAD_7_PHASE 0x7
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#define LCD_FCR_CC_SHIFT 10
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#define LCD_FCR_CC_MASK 0x7
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#define LCD_FCR_CC_0 0x0
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#define LCD_FCR_CC_1 0x1
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#define LCD_FCR_CC_2 0x2
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#define LCD_FCR_CC_3 0x3
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#define LCD_FCR_CC_4 0x4
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#define LCD_FCR_CC_5 0x5
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#define LCD_FCR_CC_6 0x6
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#define LCD_FCR_CC_7 0x7
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#define LCD_FCR_BLINKF_SHIFT 13
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#define LCD_FCR_BLINKF_MASK 0x7
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#define LCD_FCR_BLINKF_8 0x0
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#define LCD_FCR_BLINKF_16 0x1
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#define LCD_FCR_BLINKF_32 0x2
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#define LCD_FCR_BLINKF_64 0x3
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#define LCD_FCR_BLINKF_128 0x4
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#define LCD_FCR_BLINKF_256 0x5
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#define LCD_FCR_BLINKF_512 0x6
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#define LCD_FCR_BLINKF_1024 0x7
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#define LCD_FCR_BLINK_SHIFT 16
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#define LCD_FCR_BLINK_MASK 0x3
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#define LCD_FCR_BLINK_DISABLE 0x0
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#define LCD_FCR_BLINK_SEG0_COM0_ENABLE 0x1
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#define LCD_FCR_BLINK_SEG0_ENABLE 0x2
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#define LCD_FCR_BLINK_ALL_ENABLE 0x3
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#define LCD_FCR_DIV_SHIFT 18
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#define LCD_FCR_DIV_MASK 0xF
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#define LCD_FCR_DIV_16 0x0
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#define LCD_FCR_DIV_17 0x1
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#define LCD_FCR_DIV_18 0x2
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#define LCD_FCR_DIV_19 0x3
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#define LCD_FCR_DIV_20 0x4
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#define LCD_FCR_DIV_21 0x5
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#define LCD_FCR_DIV_22 0x6
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#define LCD_FCR_DIV_23 0x7
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#define LCD_FCR_DIV_24 0x8
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#define LCD_FCR_DIV_25 0x9
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#define LCD_FCR_DIV_26 0xA
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#define LCD_FCR_DIV_27 0xB
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#define LCD_FCR_DIV_28 0xC
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#define LCD_FCR_DIV_29 0xD
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#define LCD_FCR_DIV_30 0xE
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#define LCD_FCR_DIV_31 0xF
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#define LCD_FCR_PS_SHIFT 22
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#define LCD_FCR_PS_MASK 0xF
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#define LCD_FCR_PS_1 0x0
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#define LCD_FCR_PS_2 0x1
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#define LCD_FCR_PS_4 0x2
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#define LCD_FCR_PS_8 0x3
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#define LCD_FCR_PS_16 0x4
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#define LCD_FCR_PS_32 0x5
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#define LCD_FCR_PS_64 0x6
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#define LCD_FCR_PS_128 0x7
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#define LCD_FCR_PS_256 0x8
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#define LCD_FCR_PS_512 0x9
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#define LCD_FCR_PS_1024 0xA
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#define LCD_FCR_PS_2048 0xB
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#define LCD_FCR_PS_4096 0xC
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#define LCD_FCR_PS_8192 0xD
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#define LCD_FCR_PS_16384 0xE
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#define LCD_FCR_PS_32768 0xF
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/* --- LCD_SR values ------------------------------------------------------ */
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#define LCD_SR_ENS (1 << 0)
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#define LCD_SR_SOF (1 << 1)
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#define LCD_SR_UDR (1 << 2)
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#define LCD_SR_UDD (1 << 3)
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#define LCD_SR_RDY (1 << 4)
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#define LCD_SR_FCRSF (1 << 5)
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/* --- LCD_CLR values ----------------------------------------------------- */
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#define LCD_CLR_SOFC (1 << 1)
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#define LCD_CLR_UDDC (1 << 3)
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/* --- Function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void lcd_enable(void);
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void lcd_wait_step_up_ready(void);
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void lcd_wait_for_update_ready(void);
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void lcd_update(void);
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END_DECLS
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#endif
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/**@}*/
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@ -33,7 +33,7 @@ CFLAGS = -Os -g \
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-ffunction-sections -fdata-sections -MD -DSTM32L1
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# ARFLAGS = rcsv
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ARFLAGS = rcs
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OBJS = crc.o desig.o flash.o rcc.o usart.o dma.o
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OBJS = crc.o desig.o flash.o rcc.o usart.o dma.o lcd.o
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OBJS += crc_common_all.o dac_common_all.o
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OBJS += dma_common_l1f013.o
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OBJS += gpio_common_all.o gpio_common_f0234.o
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42
lib/stm32/l1/lcd.c
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42
lib/stm32/l1/lcd.c
Normal file
@ -0,0 +1,42 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2014 Nikolay Merinov <nikolay.merinov@member.fsf.org>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/stm32/l1/lcd.h>
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void lcd_enable(void)
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{
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LCD_CR |= LCD_CR_LCDEN;
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while ((LCD_SR & LCD_SR_ENS) == 0);
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}
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void lcd_wait_step_up_ready(void)
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{
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while ((LCD_SR & LCD_SR_RDY) == 0);
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}
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void lcd_wait_for_update_ready(void)
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{
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while ((LCD_SR & LCD_SR_UDR) != 0);
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}
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void lcd_update(void)
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{
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LCD_SR |= LCD_SR_UDR;
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}
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