diff --git a/lib/stm32/common/dac_common_all.c b/lib/stm32/common/dac_common_all.c
index 5d1893c1..0aa2277b 100644
--- a/lib/stm32/common/dac_common_all.c
+++ b/lib/stm32/common/dac_common_all.c
@@ -62,7 +62,7 @@ sent out.
 @code
 	gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
 		      GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO4);
-	rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_DACEN);
+	rcc_periph_clock_enable(RCC_DAC);
 	dac_disable(CHANNEL_1);
 	dac_set_waveform_characteristics(DAC_CR_MAMP1_8);
 	dac_set_waveform_generation(DAC_CR_WAVE1_NOISE);
diff --git a/lib/stm32/f1/adc.c b/lib/stm32/f1/adc.c
index 3ff12bf7..14d0ae95 100644
--- a/lib/stm32/f1/adc.c
+++ b/lib/stm32/f1/adc.c
@@ -51,10 +51,9 @@ and ADC, reset ADC and set the prescaler divider. Set dual mode to independent
 (default). Enable triggering for a software trigger.
 
 @code
-	rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_ADC1EN);
+	rcc_periph_clock_enable(RCC_ADC1);
 	adc_power_off(ADC1);
-	rcc_peripheral_reset(&RCC_APB2RSTR, RCC_APB2RSTR_ADC1RST);
-	rcc_peripheral_clear_reset(&RCC_APB2RSTR, RCC_APB2RSTR_ADC1RST);
+	rcc_periph_reset_pulse(RST_ADC1);
 	rcc_set_adcpre(RCC_CFGR_ADCPRE_PCLK2_DIV2);
 	adc_set_dual_mode(ADC_CR1_DUALMOD_IND);
 	adc_disable_scan_mode(ADC1);
diff --git a/lib/stm32/f3/adc.c b/lib/stm32/f3/adc.c
index e9a36846..dc1f7db8 100644
--- a/lib/stm32/f3/adc.c
+++ b/lib/stm32/f3/adc.c
@@ -46,7 +46,7 @@
  *
  * @code
  * gpio_mode_setup(GPIOA, GPIO_MODE_ANALOG, GPIO_PUPD_NONE, GPIO1);
- * rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_ADC1EN);
+ * rcc_periph_clock_enable(RCC_ADC1);
  * adc_set_clk_prescale(RCC_CFGR_ADCPRE_BY2);
  * adc_disable_scan_mode(ADC1);
  * adc_set_single_conversion_mode(ADC1);