diff --git a/src/target/cortexm.c b/src/target/cortexm.c
index e5231412..09657353 100644
--- a/src/target/cortexm.c
+++ b/src/target/cortexm.c
@@ -319,6 +319,10 @@ bool cortexm_probe(ADIv5_AP_t *ap)
 
 	case 0xc27:
 		t->core = "M7";
+		if ((((cpuid >> 20) & 0xf) == 0) && (((cpuid >> 0) & 0xf) < 2)) {
+			DEBUG_WARN("Silicon bug: Single stepping will enter pending "
+					   "exception handler with this M7 core revision!\n");
+		}
 		break;
 
 	case 0xc60: