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Update F1 libs with new header file locations.

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This commit is contained in:
Fergus Noble 2011-09-15 01:18:49 -07:00
parent b546f9b5a9
commit 5b4cbe7d87
14 changed files with 20 additions and 20 deletions
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2
lib/stm32f1/adc.c
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@ -31,7 +31,7 @@
* reg16 = adc_read(ADC1, ADC_CH_0); * reg16 = adc_read(ADC1, ADC_CH_0);
*/ */
#include <libopencm3/stm32/adc.h> #include <libopencm3/stm32/f1/adc.h>
void rcc_set_adc_clk(u32 prescaler) void rcc_set_adc_clk(u32 prescaler)
{ {

2
lib/stm32f1/can.c
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@ -18,7 +18,7 @@
*/ */
#include <libopencm3/stm32/can.h> #include <libopencm3/stm32/can.h>
#include <libopencm3/stm32/rcc.h> #include <libopencm3/stm32/f1/rcc.h>
void can_reset(u32 canport) void can_reset(u32 canport)
{ {

2
lib/stm32f1/dma.c
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@ -17,7 +17,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <libopencm3/stm32/dma.h> #include <libopencm3/stm32/f1/dma.h>
void dma_enable_mem2mem_mode(u32 dma, u8 channel) void dma_enable_mem2mem_mode(u32 dma, u8 channel)
{ {

2
lib/stm32f1/ethernet.c
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@ -17,7 +17,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <libopencm3/stm32/ethernet.h> #include <libopencm3/stm32/f1/ethernet.h>
void eth_smi_write(u8 phy, u8 reg, u16 data) void eth_smi_write(u8 phy, u8 reg, u16 data)
{ {

2
lib/stm32f1/exti.c
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@ -18,7 +18,7 @@
*/ */
#include <libopencm3/stm32/exti.h> #include <libopencm3/stm32/exti.h>
#include <libopencm3/stm32/gpio.h> #include <libopencm3/stm32/f1/gpio.h>
void exti_set_trigger(u32 extis, exti_trigger_type trig) void exti_set_trigger(u32 extis, exti_trigger_type trig)
{ {

2
lib/stm32f1/flash.c
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@ -18,7 +18,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <libopencm3/stm32/flash.h> #include <libopencm3/stm32/f1/flash.h>
void flash_prefetch_buffer_enable(void) void flash_prefetch_buffer_enable(void)
{ {

2
lib/stm32f1/gpio.c
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@ -34,7 +34,7 @@
* - GPIO remapping support * - GPIO remapping support
*/ */
#include <libopencm3/stm32/gpio.h> #include <libopencm3/stm32/f1/gpio.h>
void gpio_set_mode(u32 gpioport, u8 mode, u8 cnf, u16 gpios) void gpio_set_mode(u32 gpioport, u8 mode, u8 cnf, u16 gpios)
{ {

2
lib/stm32f1/nvic.c
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@ -17,7 +17,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <libopencm3/stm32/nvic.h> #include <libopencm3/stm32/f1/nvic.h>
void nvic_enable_irq(u8 irqn) void nvic_enable_irq(u8 irqn)
{ {

4
lib/stm32f1/rcc.c
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@ -19,8 +19,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <libopencm3/stm32/rcc.h> #include <libopencm3/stm32/f1/rcc.h>
#include <libopencm3/stm32/flash.h> #include <libopencm3/stm32/f1/flash.h>
/* Set the default ppre1 and ppre2 peripheral clock frequencies after reset */ /* Set the default ppre1 and ppre2 peripheral clock frequencies after reset */
u32 rcc_ppre1_frequency = 8000000; u32 rcc_ppre1_frequency = 8000000;

4
lib/stm32f1/rtc.c
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@ -18,8 +18,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <libopencm3/stm32/rcc.h> #include <libopencm3/stm32/f1/rcc.h>
#include <libopencm3/stm32/rtc.h> #include <libopencm3/stm32/f1/rtc.h>
#include <libopencm3/stm32/pwr.h> #include <libopencm3/stm32/pwr.h>
void rtc_awake_from_off(osc_t clock_source) void rtc_awake_from_off(osc_t clock_source)

2
lib/stm32f1/systick.c
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@ -17,7 +17,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <libopencm3/stm32/systick.h> #include <libopencm3/stm32/f1/systick.h>
void systick_set_reload(u32 value) void systick_set_reload(u32 value)
{ {

2
lib/stm32f1/timer.c
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@ -26,7 +26,7 @@
*/ */
#include <libopencm3/stm32/timer.h> #include <libopencm3/stm32/timer.h>
#include <libopencm3/stm32/rcc.h> #include <libopencm3/stm32/f1/rcc.h>
void timer_reset(u32 timer_peripheral) void timer_reset(u32 timer_peripheral)
{ {

2
lib/stm32f1/usart.c
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@ -17,7 +17,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#include <libopencm3/stm32/rcc.h> #include <libopencm3/stm32/f1/rcc.h>
#include <libopencm3/stm32/usart.h> #include <libopencm3/stm32/usart.h>

10
lib/stm32f2/gpio.c
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@ -77,9 +77,9 @@ void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios)
for (i = 0; i < 16; i++) { for (i = 0; i < 16; i++) {
if (!((1 << i) & gpios)) if (!((1 << i) & gpios))
continue continue;
ospeedr &= ~GPIO_OSPEEDR_MASK(i); ospeedr &= ~GPIO_OSPEED_MASK(i);
ospeedr |= GPIO_OSPEEDR(i, mode); ospeedr |= GPIO_OSPEED(i, speed);
} }
GPIO_OSPEEDR(gpioport) = ospeedr; GPIO_OSPEEDR(gpioport) = ospeedr;
@ -95,14 +95,14 @@ void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios)
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
if (!((1 << i) & gpios)) if (!((1 << i) & gpios))
continue continue;
afrl &= GPIO_AFR_MASK(i); afrl &= GPIO_AFR_MASK(i);
afrl |= GPIO_AFR(i, alt_func_num); afrl |= GPIO_AFR(i, alt_func_num);
} }
for (i = 8; i < 16; i++) { for (i = 8; i < 16; i++) {
if (!((1 << i) & gpios)) if (!((1 << i) & gpios))
continue continue;
afrl &= GPIO_AFR_MASK(i-8); afrl &= GPIO_AFR_MASK(i-8);
afrh |= GPIO_AFR(i-8, alt_func_num); afrh |= GPIO_AFR(i-8, alt_func_num);
} }