usb: Moved USB_PMA_BASE address definition to family-specific memorymap.h
credit: @fenugrec
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@ -58,7 +58,7 @@
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#define I2C1_BASE (PERIPH_BASE_APB + 0x5400)
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#define I2C1_BASE (PERIPH_BASE_APB + 0x5400)
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#define I2C2_BASE (PERIPH_BASE_APB + 0x5800)
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#define I2C2_BASE (PERIPH_BASE_APB + 0x5800)
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#define USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)
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#define USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)
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/* USB_PMA_BASE already defined in usb.h */
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#define USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)
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#define BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)
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#define BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)
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#define CRS_BASE (PERIPH_BASE_APB + 0x6C00)
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#define CRS_BASE (PERIPH_BASE_APB + 0x6C00)
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@ -59,6 +59,7 @@
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#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
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#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
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#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
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#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
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#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)
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#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)
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#define USB_PMA_BASE (PERIPH_BASE_APB1 + 0x6000)
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#define USB_CAN_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)
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#define USB_CAN_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)
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#define BX_CAN1_BASE (PERIPH_BASE_APB1 + 0x6400)
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#define BX_CAN1_BASE (PERIPH_BASE_APB1 + 0x6400)
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#define BX_CAN2_BASE (PERIPH_BASE_APB1 + 0x6800)
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#define BX_CAN2_BASE (PERIPH_BASE_APB1 + 0x6800)
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@ -58,7 +58,7 @@
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#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
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#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
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#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
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#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
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#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5C00)
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#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5C00)
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#define USB_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)
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#define USB_PMA_BASE (PERIPH_BASE_APB1 + 0x6000)
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#define BX_CAN_BASE (PERIPH_BASE_APB1 + 0x6400)
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#define BX_CAN_BASE (PERIPH_BASE_APB1 + 0x6400)
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/* PERIPH_BASE_APB1 + 0x6800 (0x4000 6800 - 0x4000 6BFF): Reserved */
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/* PERIPH_BASE_APB1 + 0x6800 (0x4000 6800 - 0x4000 6BFF): Reserved */
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/* PERIPH_BASE_APB1 + 0x6C00 (0x4000 6C00 - 0x4000 6FFF): Reserved */
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/* PERIPH_BASE_APB1 + 0x6C00 (0x4000 6C00 - 0x4000 6FFF): Reserved */
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@ -45,7 +45,7 @@
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#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
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#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
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#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
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#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
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#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)
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#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)
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#define USB_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)
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#define USB_PMA_BASE (PERIPH_BASE_APB1 + 0x6000)
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#define CRS_BASE (PERIPH_BASE_APB1 + 0x6C00)
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#define CRS_BASE (PERIPH_BASE_APB1 + 0x6C00)
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#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)
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#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)
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#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400)
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#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400)
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@ -56,7 +56,7 @@
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#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
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#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
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#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
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#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
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#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)
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#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)
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#define USB_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)
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#define USB_PMA_BASE (PERIPH_BASE_APB1 + 0x6000)
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/* gap */
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/* gap */
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#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)
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#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)
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#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400)
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#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400)
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@ -41,11 +41,6 @@ LGPL License Terms @ref lgpl_license
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#include <libopencm3/stm32/memorymap.h>
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#include <libopencm3/stm32/memorymap.h>
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#include <libopencm3/stm32/tools.h>
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#include <libopencm3/stm32/tools.h>
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/* --- USB base addresses -------------------------------------------------- */
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/* USB packet buffer memory base address. */
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#define USB_PMA_BASE 0x40006000L
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/* --- USB general registers ----------------------------------------------- */
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/* --- USB general registers ----------------------------------------------- */
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/* USB Control register */
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/* USB Control register */
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