diff --git a/include/libopencm3/stm32/common/spi_common_f03.h b/include/libopencm3/stm32/common/spi_common_f03.h
new file mode 100644
index 00000000..6e1984c2
--- /dev/null
+++ b/include/libopencm3/stm32/common/spi_common_f03.h
@@ -0,0 +1,117 @@
+/** @addtogroup spi_defines
+ */
+
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see .
+ */
+
+/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA SPI.H
+ * The order of header inclusion is important. spi.h includes the device
+ * specific memorymap.h header before including this header file.*/
+
+/** @cond */
+#ifdef LIBOPENCM3_SPI_H
+/** @endcond */
+#ifndef LIBOPENCM3_SPI_COMMON_F03_H
+#define LIBOPENCM3_SPI_COMMON_F03_H
+
+/**@{*/
+
+#include
+
+/*
+ * This file extends the common stm32 version with defintions only
+ * applicable to the STM32F0/F3 series of devices
+ */
+
+/* DFF: Data frame format */
+/****************************************************************************/
+/** @defgroup spi_dff SPI data frame format
+ * @ingroup spi_defines
+ *
+ * @{*/
+
+#define SPI_CR1_CRCL_8BIT (0 << 11)
+#define SPI_CR1_CRCL_16BIT (1 << 11)
+/**@}*/
+#define SPI_CR1_CRCL (1 << 11)
+
+/* --- SPI_CR2 values ------------------------------------------------------ */
+
+/* LDMA_TX: Last DMA transfer for transmission */
+#define SPI_CR2_LDMA_TX (1 << 14)
+
+/* LDMA_RX: Last DMA transfer for reception */
+#define SPI_CR2_LDMA_RX (1 << 13)
+
+/* FRXTH: FIFO reception threshold */
+#define SPI_CR2_FRXTH (1 << 12)
+
+/* DS [3:0]: Data size */
+/* 0x0 - 0x2 NOT USED */
+#define SPI_CR2_DS_4BIT (0x3 << 8)
+#define SPI_CR2_DS_5BIT (0x4 << 8)
+#define SPI_CR2_DS_6BIT (0x5 << 8)
+#define SPI_CR2_DS_7BIT (0x6 << 8)
+#define SPI_CR2_DS_8BIT (0x7 << 8)
+#define SPI_CR2_DS_9BIT (0x8 << 8)
+#define SPI_CR2_DS_10BIT (0x9 << 8)
+#define SPI_CR2_DS_11BIT (0xA << 8)
+#define SPI_CR2_DS_12BIT (0xB << 8)
+#define SPI_CR2_DS_13BIT (0xC << 8)
+#define SPI_CR2_DS_14BIT (0xD << 8)
+#define SPI_CR2_DS_15BIT (0xE << 8)
+#define SPI_CR2_DS_16BIT (0xF << 8)
+#define SPI_CR2_DS_MASK (0xF << 8)
+
+/* NSSP: NSS pulse management */
+#define SPI_CR2_NSSP (1 << 3)
+
+/* --- SPI_SR values ------------------------------------------------------- */
+
+/* FTLVL[1:0]: FIFO Transmission Level */
+#define SPI_SR_FTLVL_FIFO_EMPTY (0x0 << 11)
+#define SPI_SR_FTLVL_QUARTER_FIFO (0x1 << 11)
+#define SPI_SR_FTLVL_HALF_FIFO (0x2 << 11)
+#define SPI_SR_FTLVL_FIFO_FULL (0x3 << 11)
+
+/* FRLVL[1:0]: FIFO Reception Level */
+#define SPI_SR_FRLVL_FIFO_EMPTY (0x0 << 9)
+#define SPI_SR_FRLVL_QUARTER_FIFO (0x1 << 9)
+#define SPI_SR_FRLVL_HALF_FIFO (0x2 << 9)
+#define SPI_SR_FRLVL_FIFO_FULL (0x3 << 9)
+
+/* --- Function prototypes ------------------------------------------------- */
+
+BEGIN_DECLS
+
+void spi_set_data_size(uint32_t spi, uint16_t data_s);
+void spi_fifo_reception_threshold_8bit(uint32_t spi);
+void spi_fifo_reception_threshold_16bit(uint32_t spi);
+void spi_i2s_mode_spi_mode(uint32_t spi);
+void spi_send8(uint32_t spi, uint8_t data);
+uint8_t spi_read8(uint32_t spi);
+
+END_DECLS
+
+#endif
+/** @cond */
+#else
+#warning "spi_common_f03.h should not be included explicitly, only via spi.h"
+#endif
+/** @endcond */
+/**@}*/
+
diff --git a/include/libopencm3/stm32/common/spi_common_l1f124.h b/include/libopencm3/stm32/common/spi_common_l1f124.h
index a45220eb..ddfe6128 100644
--- a/include/libopencm3/stm32/common/spi_common_l1f124.h
+++ b/include/libopencm3/stm32/common/spi_common_l1f124.h
@@ -58,7 +58,7 @@ specific memorymap.h header before including this header file.*/
#endif
/** @cond */
#else
-#warning "spi_common_f24.h should not be included explicitly, only via spi.h"
+#warning "spi_common_l1f124.h should not be included explicitly, only via spi.h"
#endif
/** @endcond */
/**@}*/
diff --git a/include/libopencm3/stm32/f0/spi.h b/include/libopencm3/stm32/f0/spi.h
index 3312b332..bbd9da40 100644
--- a/include/libopencm3/stm32/f0/spi.h
+++ b/include/libopencm3/stm32/f0/spi.h
@@ -32,94 +32,6 @@
#define LIBOPENCM3_SPI_H
#include
-#include
-
-/*****************************************************************************/
-/* Module definitions */
-/*****************************************************************************/
-
-#define SPI1_BASE SPI1_I2S1_BASE
-
-/*****************************************************************************/
-/* Register definitions */
-/*****************************************************************************/
-
-/*****************************************************************************/
-/* Register values */
-/*****************************************************************************/
-
-/* DFF: Data frame format */
-/** @defgroup spi_dff SPI data frame format
- * @ingroup spi_defines
- *
- * @{*/
-#define SPI_CR1_CRCL_8BIT (0 << 11)
-#define SPI_CR1_CRCL_16BIT (1 << 11)
-/**@}*/
-#define SPI_CR1_CRCL (1 << 11)
-
-/* --- SPI_CR2 values ------------------------------------------------------ */
-
-/* LDMA_TX: Last DMA transfer for transmission */
-#define SPI_CR2_LDMA_TX (1 << 14)
-
-/* LDMA_RX: Last DMA transfer for reception */
-#define SPI_CR2_LDMA_RX (1 << 13)
-
-/* FRXTH: FIFO reception threshold */
-#define SPI_CR2_FRXTH (1 << 12)
-
-/* DS [3:0]: Data size */
-/* 0x0 - 0x2 NOT USED */
-#define SPI_CR2_DS_4BIT (0x3 << 8)
-#define SPI_CR2_DS_5BIT (0x4 << 8)
-#define SPI_CR2_DS_6BIT (0x5 << 8)
-#define SPI_CR2_DS_7BIT (0x6 << 8)
-#define SPI_CR2_DS_8BIT (0x7 << 8)
-#define SPI_CR2_DS_9BIT (0x8 << 8)
-#define SPI_CR2_DS_10BIT (0x9 << 8)
-#define SPI_CR2_DS_11BIT (0xA << 8)
-#define SPI_CR2_DS_12BIT (0xB << 8)
-#define SPI_CR2_DS_13BIT (0xC << 8)
-#define SPI_CR2_DS_14BIT (0xD << 8)
-#define SPI_CR2_DS_15BIT (0xE << 8)
-#define SPI_CR2_DS_16BIT (0xF << 8)
-#define SPI_CR2_DS_MASK (0xF << 8)
-
-/* NSSP: NSS pulse management */
-#define SPI_CR2_NSSP (1 << 3)
-
-/* --- SPI_SR values ------------------------------------------------------- */
-
-/* FTLVL[1:0]: FIFO Transmission Level */
-#define SPI_SR_FTLVL_FIFO_EMPTY (0x0 << 11)
-#define SPI_SR_FTLVL_QUARTER_FIFO (0x1 << 11)
-#define SPI_SR_FTLVL_HALF_FIFO (0x2 << 11)
-#define SPI_SR_FTLVL_FIFO_FULL (0x3 << 11)
-
-/* FRLVL[1:0]: FIFO Reception Level */
-#define SPI_SR_FRLVL_FIFO_EMPTY (0x0 << 9)
-#define SPI_SR_FRLVL_QUARTER_FIFO (0x1 << 9)
-#define SPI_SR_FRLVL_HALF_FIFO (0x2 << 9)
-#define SPI_SR_FRLVL_FIFO_FULL (0x3 << 9)
-
-/*****************************************************************************/
-/* API definitions */
-/*****************************************************************************/
-
-/*****************************************************************************/
-/* API Functions */
-/*****************************************************************************/
-
-BEGIN_DECLS
-
-void spi_set_data_size(uint32_t spi, uint16_t data_s);
-void spi_fifo_reception_threshold_8bit(uint32_t spi);
-void spi_fifo_reception_threshold_16bit(uint32_t spi);
-void spi_i2s_mode_spi_mode(uint32_t spi);
-void spi_send8(uint32_t spi, uint8_t data);
-uint8_t spi_read8(uint32_t spi);
-
-END_DECLS
+#include
#endif
diff --git a/include/libopencm3/stm32/f3/spi.h b/include/libopencm3/stm32/f3/spi.h
index 51220b4b..dd8668e2 100644
--- a/include/libopencm3/stm32/f3/spi.h
+++ b/include/libopencm3/stm32/f3/spi.h
@@ -32,81 +32,11 @@
#define LIBOPENCM3_SPI_H
#include
-#include
-
-/* DFF: Data frame format */
-/****************************************************************************/
-/** @defgroup spi_dff SPI data frame format
- * @ingroup spi_defines
- *
- * @{*/
+#include
#define SPI_DR8(spi_base) MMIO8(spi_base + 0x0c)
#define SPI1_DR8 SPI_DR8(SPI1_BASE)
#define SPI2_DR8 SPI_DR8(SPI2_I2S_BASE)
#define SPI3_DR8 SPI_DR8(SPI3_I2S_BASE)
-#define SPI_CR1_CRCL_8BIT (0 << 11)
-#define SPI_CR1_CRCL_16BIT (1 << 11)
-/**@}*/
-#define SPI_CR1_CRCL (1 << 11)
-
-/* --- SPI_CR2 values ------------------------------------------------------ */
-
-/* LDMA_TX: Last DMA transfer for transmission */
-#define SPI_CR2_LDMA_TX (1 << 14)
-
-/* LDMA_RX: Last DMA transfer for reception */
-#define SPI_CR2_LDMA_RX (1 << 13)
-
-/* FRXTH: FIFO reception threshold */
-#define SPI_CR2_FRXTH (1 << 12)
-
-/* DS [3:0]: Data size */
-/* 0x0 - 0x2 NOT USED */
-#define SPI_CR2_DS_4BIT (0x3 << 8)
-#define SPI_CR2_DS_5BIT (0x4 << 8)
-#define SPI_CR2_DS_6BIT (0x5 << 8)
-#define SPI_CR2_DS_7BIT (0x6 << 8)
-#define SPI_CR2_DS_8BIT (0x7 << 8)
-#define SPI_CR2_DS_9BIT (0x8 << 8)
-#define SPI_CR2_DS_10BIT (0x9 << 8)
-#define SPI_CR2_DS_11BIT (0xA << 8)
-#define SPI_CR2_DS_12BIT (0xB << 8)
-#define SPI_CR2_DS_13BIT (0xC << 8)
-#define SPI_CR2_DS_14BIT (0xD << 8)
-#define SPI_CR2_DS_15BIT (0xE << 8)
-#define SPI_CR2_DS_16BIT (0xF << 8)
-#define SPI_CR2_DS_MASK (0xF << 8)
-
-/* NSSP: NSS pulse management */
-#define SPI_CR2_NSSP (1 << 3)
-
-/* --- SPI_SR values ------------------------------------------------------- */
-
-/* FTLVL[1:0]: FIFO Transmission Level */
-#define SPI_SR_FTLVL_FIFO_EMPTY (0x0 << 11)
-#define SPI_SR_FTLVL_QUARTER_FIFO (0x1 << 11)
-#define SPI_SR_FTLVL_HALF_FIFO (0x2 << 11)
-#define SPI_SR_FTLVL_FIFO_FULL (0x3 << 11)
-
-/* FRLVL[1:0]: FIFO Reception Level */
-#define SPI_SR_FRLVL_FIFO_EMPTY (0x0 << 9)
-#define SPI_SR_FRLVL_QUARTER_FIFO (0x1 << 9)
-#define SPI_SR_FRLVL_HALF_FIFO (0x2 << 9)
-#define SPI_SR_FRLVL_FIFO_FULL (0x3 << 9)
-
-/* --- Function prototypes ------------------------------------------------- */
-
-BEGIN_DECLS
-
-void spi_set_data_size(uint32_t spi, uint16_t data_s);
-void spi_fifo_reception_threshold_8bit(uint32_t spi);
-void spi_fifo_reception_threshold_16bit(uint32_t spi);
-void spi_i2s_mode_spi_mode(uint32_t spi);
-void spi_send8(uint32_t spi, uint8_t data);
-uint8_t spi_read8(uint32_t spi);
-
-END_DECLS
-
#endif
diff --git a/lib/stm32/common/spi_common_f124.c b/lib/stm32/common/spi_common_l1f124.c
similarity index 100%
rename from lib/stm32/common/spi_common_f124.c
rename to lib/stm32/common/spi_common_l1f124.c
diff --git a/lib/stm32/f1/Makefile b/lib/stm32/f1/Makefile
index f69e2d1e..53ed5e06 100644
--- a/lib/stm32/f1/Makefile
+++ b/lib/stm32/f1/Makefile
@@ -38,7 +38,7 @@ OBJS = adc.o can.o desig.o ethernet.o flash.o gpio.o \
OBJS += crc_common_all.o dac_common_all.o dma_common_l1f013.o \
gpio_common_all.o i2c_common_all.o iwdg_common_all.o \
- pwr_common_all.o spi_common_all.o spi_common_f124.o \
+ pwr_common_all.o spi_common_all.o spi_common_l1f124.o \
timer_common_all.o usart_common_all.o usart_common_f124.o \
exti_common_all.o
diff --git a/lib/stm32/f2/Makefile b/lib/stm32/f2/Makefile
index 40eb6a9f..0e66667f 100644
--- a/lib/stm32/f2/Makefile
+++ b/lib/stm32/f2/Makefile
@@ -38,7 +38,7 @@ OBJS = gpio.o rcc.o
OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
gpio_common_all.o gpio_common_f0234.o i2c_common_all.o \
iwdg_common_all.o rtc_common_l1f024.o spi_common_all.o \
- spi_common_f124.o timer_common_all.o timer_common_f234.o \
+ spi_common_l1f124.o timer_common_all.o timer_common_f234.o \
timer_common_f24.o usart_common_all.o usart_common_f124.o \
flash_common_f234.o flash_common_f24.o hash_common_f24.o \
crypto_common_f24.o exti_common_all.o
diff --git a/lib/stm32/f4/Makefile b/lib/stm32/f4/Makefile
index 2b3479bb..de16f52a 100644
--- a/lib/stm32/f4/Makefile
+++ b/lib/stm32/f4/Makefile
@@ -41,7 +41,7 @@ OBJS = adc.o can.o gpio.o pwr.o rcc.o rtc.o crypto.o
OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
gpio_common_all.o gpio_common_f0234.o i2c_common_all.o \
iwdg_common_all.o pwr_common_all.o rtc_common_l1f024.o \
- spi_common_all.o spi_common_f124.o timer_common_all.o \
+ spi_common_all.o spi_common_l1f124.o timer_common_all.o \
timer_common_f234.o timer_common_f24.o usart_common_all.o \
usart_common_f124.o flash_common_f234.o flash_common_f24.o \
hash_common_f24.o crypto_common_f24.o exti_common_all.o
diff --git a/lib/stm32/l1/Makefile b/lib/stm32/l1/Makefile
index 980390df..8205ec5f 100644
--- a/lib/stm32/l1/Makefile
+++ b/lib/stm32/l1/Makefile
@@ -38,7 +38,7 @@ OBJS += dma_common_l1f013.o
OBJS += gpio_common_all.o gpio_common_f0234.o
OBJS += i2c_common_all.o iwdg_common_all.o
OBJS += pwr_common_all.o pwr.o rtc_common_l1f024.o
-OBJS += spi_common_all.o timer_common_all.o
+OBJS += spi_common_all.o spi_common_l1f124.o timer_common_all.o
OBJS += usart_common_all.o usart_common_f124.o
OBJS += exti_common_all.o
OBJS += usb.o usb_control.o usb_standard.o usb_f103.o