Small improvements of using FLASH memory in STM32F1XX
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@ -103,6 +103,7 @@ void flash_clear_eop_flag(void);
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void flash_clear_wrprterr_flag(void);
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void flash_clear_wrprterr_flag(void);
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void flash_clear_bsy_flag(void);
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void flash_clear_bsy_flag(void);
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void flash_clear_status_flags(void);
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void flash_clear_status_flags(void);
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u32 flash_get_status_flags(void);
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void flash_unlock_option_bytes(void);
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void flash_unlock_option_bytes(void);
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void flash_erase_all_pages(void);
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void flash_erase_all_pages(void);
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void flash_erase_page(u32 page_address);
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void flash_erase_page(u32 page_address);
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@ -25,6 +25,7 @@
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/* --- STM32 specific peripheral definitions ------------------------------- */
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/* --- STM32 specific peripheral definitions ------------------------------- */
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/* Memory map for all busses */
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/* Memory map for all busses */
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#define FLASH_BASE ((u32)0x08000000)
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#define PERIPH_BASE ((u32)0x40000000)
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#define PERIPH_BASE ((u32)0x40000000)
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#define INFO_BASE ((u32)0x1ffff000)
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#define INFO_BASE ((u32)0x1ffff000)
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#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)
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#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)
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@ -93,6 +93,11 @@ void flash_clear_status_flags(void)
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flash_clear_bsy_flag();
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flash_clear_bsy_flag();
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}
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}
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u32 flash_get_status_flags(void)
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{
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return (FLASH_SR &= (FLASH_SR_PGERR | FLASH_SR_EOP | FLASH_SR_WRPRTERR | FLASH_SR_BSY));
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}
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void flash_unlock_option_bytes(void)
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void flash_unlock_option_bytes(void)
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{
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{
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/* F1 uses same keys for flash and option */
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/* F1 uses same keys for flash and option */
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@ -102,8 +107,7 @@ void flash_unlock_option_bytes(void)
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void flash_wait_for_last_operation(void)
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void flash_wait_for_last_operation(void)
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{
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{
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while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY)
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while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY);
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;
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}
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}
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void flash_program_word(u32 address, u32 data)
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void flash_program_word(u32 address, u32 data)
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