From 66eab73570a7e26fe8f35dc9bb01877150b68273 Mon Sep 17 00:00:00 2001
From: Federico Ruiz Ugalde <fruiz@eie.ucr.ac.cr>
Date: Sat, 29 Jun 2013 19:19:07 -0600
Subject: [PATCH] stm32f3: Some additional f3 clock functions for the i2c.

---
 include/libopencm3/stm32/f3/rcc.h |  3 +++
 lib/stm32/f3/rcc.c                | 23 +++++++++++++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/include/libopencm3/stm32/f3/rcc.h b/include/libopencm3/stm32/f3/rcc.h
index e9bbf82a..84f166c8 100644
--- a/include/libopencm3/stm32/f3/rcc.h
+++ b/include/libopencm3/stm32/f3/rcc.h
@@ -433,6 +433,9 @@ void rcc_set_main_pll_hsi(uint32_t pll);
 uint32_t rcc_get_system_clock_source(void);
 void rcc_backupdomain_reset(void);
 void rcc_clock_setup_hsi(const clock_scale_t *clock);
+void rcc_set_i2c_clock_hsi(uint32_t i2c);
+void rcc_set_i2c_clock_sysclk(uint32_t i2c);
+uint32_t rcc_get_i2c_clocks(void);
 
 END_DECLS
 
diff --git a/lib/stm32/f3/rcc.c b/lib/stm32/f3/rcc.c
index 70702610..a0ee9276 100644
--- a/lib/stm32/f3/rcc.c
+++ b/lib/stm32/f3/rcc.c
@@ -24,6 +24,7 @@
 #include <libopencm3/cm3/assert.h>
 #include <libopencm3/stm32/f3/rcc.h>
 #include <libopencm3/stm32/f3/flash.h>
+#include <libopencm3/stm32/f3/i2c.h>
 
 /* Set the default ppre1 and ppre2 peripheral clock frequencies after reset. */
 uint32_t rcc_ppre1_frequency = 8000000;
@@ -422,3 +423,25 @@ void rcc_backupdomain_reset(void)
 	RCC_BDCR &= ~RCC_BDCR_BDRST;
 }
 
+void rcc_set_i2c_clock_hsi(uint32_t i2c) {
+  if (i2c==I2C1) {
+    RCC_CFGR3 &= ~RCC_CFGR3_I2C1SW;
+  }
+  if (i2c==I2C2) {
+    RCC_CFGR3 &= ~RCC_CFGR3_I2C2SW;
+  }
+}
+
+void rcc_set_i2c_clock_sysclk(uint32_t i2c) {
+  if (i2c==I2C1) {
+    RCC_CFGR3 |= RCC_CFGR3_I2C1SW;
+  }
+  if (i2c==I2C2) {
+    RCC_CFGR3 |= RCC_CFGR3_I2C2SW;
+  }
+}
+
+uint32_t rcc_get_i2c_clocks(void)
+{
+  return(RCC_CFGR3 & (RCC_CFGR3_I2C1SW | RCC_CFGR3_I2C2SW));
+}