various enhancements for header generation
* don't reference sections that don't exist (typically happens for registers that don't contain any fields and are interpreted numerically. * allow templates to use override_backref for surpressing the list of registers that use it * print doc for fields even when it uses values or only exports a mask * allow fields to define their own mask; those fields have to define their values explicitly too, and don't have to provide a shift * don't print a "No values defined for the field" lines, as there's always a mask in that case by now.
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chrysn
parent
c2fdd6e751
commit
692817059c
@ -53,10 +53,10 @@
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#define CMU_HFCORECLKDIV MMIO32(CMU_BASE + 0x004) /**< @see EFM32TG_CMU_HFCORECLKDIV_values */
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#define CMU_HFPERCLKDIV MMIO32(CMU_BASE + 0x008) /**< @see EFM32TG_CMU_HFPERCLKDIV_bits */
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#define CMU_HFRCOCTRL MMIO32(CMU_BASE + 0x00c) /**< @see EFM32TG_CMU_HFRCOCTRL_bits */
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#define CMU_LFRCOCTRL MMIO32(CMU_BASE + 0x010) /**< @see EFM32TG_CMU_LFRCOCTRL_bits */
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#define CMU_LFRCOCTRL MMIO32(CMU_BASE + 0x010)
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#define CMU_AUXHFRCOCTRL MMIO32(CMU_BASE + 0x014) /**< @see EFM32TG_CMU_AUXHFRCOCTRL_bits */
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#define CMU_CALCTRL MMIO32(CMU_BASE + 0x018) /**< @see EFM32TG_CMU_CALCTRL_bits */
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#define CMU_CALCNT MMIO32(CMU_BASE + 0x01c) /**< @see EFM32TG_CMU_CALCNT_bits */
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#define CMU_CALCNT MMIO32(CMU_BASE + 0x01c)
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#define CMU_OSCENCMD MMIO32(CMU_BASE + 0x020) /**< @see EFM32TG_CMU_OSCENCMD_bits */
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#define CMU_CMD MMIO32(CMU_BASE + 0x024) /**< @see EFM32TG_CMU_CMD_bits */
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#define CMU_LFCLKSEL MMIO32(CMU_BASE + 0x028) /**< @see EFM32TG_CMU_LFCLKSEL_bits */
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@ -128,7 +128,6 @@
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#define CMU_CTRL_HFXOTIMEOUT_16KCYCLES (3<<9)
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#define CMU_CTRL_HFXOTIMEOUT_MASK (0x3<<9)
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#define CMU_CTRL_HFXOGLITCHDETEN (1<<7)
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/* No values defined for the field HFXOBUFCUR */
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#define CMU_CTRL_HFXOBUFCUR_MASK (0x3<<5)
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#define CMU_CTRL_HFXOBOOST_50PCENT (0<<2)
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#define CMU_CTRL_HFXOBOOST_70PCENT (1<<2)
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@ -194,7 +193,6 @@
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* @{
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*/
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/* No values defined for the field SUDELAY */
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#define CMU_HFRCOCTRL_SUDELAY_MASK (0x1f<<12)
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#define CMU_HFRCOCTRL_BAND_1MHZ (0<<8)
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#define CMU_HFRCOCTRL_BAND_7MHZ (1<<8)
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@ -203,7 +201,6 @@
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#define CMU_HFRCOCTRL_BAND_21MHZ (4<<8)
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#define CMU_HFRCOCTRL_BAND_28MHZ (5<<8)
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#define CMU_HFRCOCTRL_BAND_MASK (0x7<<8)
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/* No values defined for the field TUNING */
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#define CMU_HFRCOCTRL_TUNING_MASK (0xff<<0)
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/** @} */
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@ -223,7 +220,6 @@
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#define CMU_AUXHFRCOCTRL_BAND_28MHZ (6<<8)
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#define CMU_AUXHFRCOCTRL_BAND_21MHZ (7<<8)
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#define CMU_AUXHFRCOCTRL_BAND_MASK (0x7<<8)
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/* No values defined for the field TUNING */
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#define CMU_AUXHFRCOCTRL_TUNING_MASK (0xff<<0)
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/** @} */
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@ -542,7 +538,6 @@
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#define CMU_LCDCTRL_VBFDIV_DIV128 (7<<4)
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#define CMU_LCDCTRL_VBFDIV_MASK (0x7<<4)
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#define CMU_LCDCTRL_VBOOSTEN (1<<3)
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/* No values defined for the field FDIV */
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#define CMU_LCDCTRL_FDIV_MASK (0x7<<0)
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/** @} */
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@ -153,6 +153,7 @@ registers:
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offset: 0x010
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definition_baserefext: ".5.5"
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length: 7
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type: uint
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- name: AUXHFRCOCTRL
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offset: 0x014
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definition_baserefext: ".5.6"
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@ -200,6 +201,7 @@ registers:
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offset: 0x01c
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definition_baserefext: ".5.8"
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length: 19
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type: uint
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- name: OSCENCMD
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offset: 0x020
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definition_baserefext: ".5.9"
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@ -75,16 +75,19 @@ def yaml2h(filenamebase):
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nl()
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for regdata in regs:
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if 'is_template' in regdata:
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has_bits = "fields" in regdata
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has_values = "values" in regdata
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is_template = "is_template" in regdata
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if is_template:
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# this isn't a real register, just a template
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continue
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secondcomponent_name = regdata['name']
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if ('fields' in regdata and isinstance(regdata['fields'], str)) or ('values' in regdata and isinstance(regdata['values'], str)):
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if (has_bits and isinstance(regdata['fields'], str)) or (has_values and isinstance(regdata['values'], str)):
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# uses a template
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secondcomponent_name = regdata['fields'] if 'fields' in regdata else regdata['values']
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secondcomponent_name = regdata['fields'] if has_bits else regdata['values']
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regs_dict[secondcomponent_name]['is_template'].append(regdata['name'])
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define("%s_%s"%(data['shortname'], regdata['name']), "MMIO32(%s_BASE + %#.003x)"%(data['shortname'], regdata['offset']), "@see %s_%s_%s"%(data['shortdocname'], secondcomponent_name, 'values' if 'values' in regdata else 'bits'))
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define("%s_%s"%(data['shortname'], regdata['name']), "MMIO32(%s_BASE + %#.003x)"%(data['shortname'], regdata['offset']), "@see %s_%s_%s"%(data['shortdocname'], secondcomponent_name, 'values' if 'values' in regdata else 'bits') if has_bits or has_values else None)
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nl()
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wc_close() # close register definitions
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nl()
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@ -104,15 +107,18 @@ def yaml2h(filenamebase):
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if is_template:
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commentlines.append("%s for the {shortname} \"{name}\" group of registers (%s)"%("Bit states" if has_bits else "Values", ", ".join(regdata['is_template'])))
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assert len(regdata['is_template']) > 0, "What should I talk about when nobody uses this template?"
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commentlines.append("These registers use this:")
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commentlines.append("<ul>") # FIXME: once we're using markdown 1.8, this can be changed to markdown
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for user in regdata['is_template']:
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userdata = regs_dict[user]
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# FIXME: this is an ugly hack around this being in a single wc() line which doesn't take per-line contexts
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mergeddata = data.copy()
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mergeddata.update(userdata)
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commentlines.append(("<li>The {shortname}_{name} register; see {baseref}{definition_baserefext} for definitions"+regdata.get("details", "."+"</li>")).format(**mergeddata))
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commentlines.append("</ul>")
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if 'override_backref' in regdata:
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commentlines.append(regdata['override_backref'])
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else:
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commentlines.append("These registers use this:")
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commentlines.append("<ul>") # FIXME: once we're using markdown 1.8, this can be changed to markdown
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for user in regdata['is_template']:
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userdata = regs_dict[user]
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# FIXME: this is an ugly hack around this being in a single wc() line which doesn't take per-line contexts
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mergeddata = data.copy()
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mergeddata.update(userdata)
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commentlines.append(("<li>The {shortname}_{name} register; see {baseref}{definition_baserefext} for definitions"+regdata.get("details", "."+"</li>")).format(**mergeddata))
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commentlines.append("</ul>")
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commentlines.append('@defgroup {shortdocname}_{name}_%s {shortname} {name} %s'%(('bits' if has_bits else 'values', 'bits group' if has_bits else 'values group')))
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else:
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commentlines.append("%s for the {shortname}_{name} register"%("Bit states" if has_bits else "Values"))
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@ -126,18 +132,26 @@ def yaml2h(filenamebase):
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for field in regdata['fields']:
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#shiftdefine = "_%s_%s_%s_shift"%(shortname, regdata['name'], field['name'])
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#define(shiftdefine, field['shift'])
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# there is one condition under which field's doc would get shown; show it immediately otherwise
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if 'doc' in field and not ("values" not in field and field.get("length", 1) == 1):
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wc(field['doc'])
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if "values" in field:
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for value in field.get("values"):
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define("%s_%s_%s_%s"%(data['shortname'], regdata['name'], field['name'], value['name']), "(%s<<%s)"%(value['value'], field['shift']), value.get('doc', None))
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define("%s_%s_%s_%s"%(data['shortname'], regdata['name'], field['name'], value['name']), value['value'] if "mask" in field else "(%s<<%s)"%(value['value'], field['shift']), value.get('doc', None))
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else:
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if field.get('length', 1) == 1:
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define("%s_%s_%s"%(data['shortname'], regdata['name'], field['name']), "(1<<%s)"%field['shift'], field.get('doc', None))
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else:
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# FIXME: this should require the 'type' parameter to be set on this field
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outfile.write("/* No values defined for the field %s */\n"%field['name'])
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pass
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if "values" in field or field.get("length", 1) != 1:
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mask = "(%#x<<%s)"%(~(~0<<field.get('length', 1)), field['shift'])
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if "mask" in field:
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mask = field['mask']
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else:
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mask = "(%#x<<%s)"%(~(~0<<field.get('length', 1)), field['shift'])
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define("%s_%s_%s_MASK"%(data['shortname'], regdata['name'], field['name']), mask)
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else:
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for value in regdata['values']:
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