From 6967a02576542c9dcd5675fb491255b1a7a4fd5c Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Fri, 11 Nov 2011 21:50:18 +0100 Subject: [PATCH] stm32/iwdg.h: Document reserved bits. --- include/libopencm3/stm32/iwdg.h | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/include/libopencm3/stm32/iwdg.h b/include/libopencm3/stm32/iwdg.h index bf2784ab..41d63cae 100644 --- a/include/libopencm3/stm32/iwdg.h +++ b/include/libopencm3/stm32/iwdg.h @@ -35,17 +35,21 @@ #define IWDG_RLR MMIO32(IWDG_BASE + 0x08) /* Status register (IWDG_SR) */ -#define IWDG_SR MMIO32(IWDG_BASE + 0x0C) +#define IWDG_SR MMIO32(IWDG_BASE + 0x0c) /* --- IWDG_KR values ------------------------------------------------------ */ -/* KEY[15:0]: Key value */ -#define IWDG_KR_RESET 0xAAAA +/* Bits [31:16]: Reserved. */ + +/* KEY[15:0]: Key value (write-only, reads as 0x0000) */ +#define IWDG_KR_RESET 0xaaaa #define IWDG_KR_UNLOCK 0x5555 -#define IWDG_KR_START 0xCCCC +#define IWDG_KR_START 0xcccc /* --- IWDG_PR values ------------------------------------------------------ */ +/* Bits [31:3]: Reserved. */ + /* PR[2:0]: Prescaler divider */ #define IWDG_PR_LSB 0 #define IWDG_PR_DIV4 0x0 @@ -60,10 +64,14 @@ /* --- IWDG_RLR values ----------------------------------------------------- */ +/* Bits [31:12]: Reserved. */ + /* RL[11:0]: Watchdog counter reload value */ /* --- IWDG_SR values ------------------------------------------------------ */ +/* Bits [31:2]: Reserved. */ + /* RVU: Watchdog counter reload value update */ #define IWDG_SR_RVU (1 << 1) @@ -72,4 +80,6 @@ /* --- IWDG funtion prototypes---------------------------------------------- */ +/* TODO */ + #endif