diff --git a/scripts/gdb.py b/scripts/gdb.py
index fc3572c9..11e8a90f 100644
--- a/scripts/gdb.py
+++ b/scripts/gdb.py
@@ -163,11 +163,11 @@ class Target:
 			data = unhexify(reply)
 		except Excpetion:
 			raise Exception('Invalid response to memory read packet: %r' % reply)
-		return struct.unpack("16L", data)
+		return struct.unpack("=16L", data)
 
 	def write_regs(self, *regs):
 		"""Write target core registers"""
-		data = struct.pack("%dL" % len(regs), *regs)
+		data = struct.pack("=%dL" % len(regs), *regs)
 		self.putpacket("G" + hexify(data))
 		if self.getpacket() != 'OK': 
 			raise Exception('Error writing to target core registers')
diff --git a/scripts/hexprog.py b/scripts/hexprog.py
index e82c9180..128e55eb 100755
--- a/scripts/hexprog.py
+++ b/scripts/hexprog.py
@@ -101,7 +101,13 @@ if __name__ == "__main__":
 		exit(-1)
 
 	try:
-		target = gdb.Target(Serial(dev, baud, timeout=3))
+		s = Serial(dev, baud, timeout=3)
+		s.setDTR(1)
+		while s.read(1024):
+			pass
+
+		target = gdb.Target(s)
+		
 	except SerialException, e:
 		print("FATAL: Failed to open serial device!\n%s\n" % e[0])
 		exit(-1)