stm32: usart-v2: Extended USART functions (data/pin inversion, half duplex)
Includes receive timeout, all inversions and duplex and convenience functions. Applies for F0 and F3 so far.
This commit is contained in:
Cem Basoglu
Karl Palsson
parent
2c1757d269
commit
6b5150a4dc
73
include/libopencm3/stm32/common/usart_common_v2.h
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73
include/libopencm3/stm32/common/usart_common_v2.h
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@ -0,0 +1,73 @@
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/** @addtogroup usart_defines
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@author @htmlonly © @endhtmlonly 2016 Cem Basoglu <cem.basoglu@web.de>
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2016 Cem Basoglu <cem.basoglu@web.de>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/** @cond */
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#if defined(LIBOPENCM3_USART_H)
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/** @endcond */
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#ifndef LIBOPENCM3_USART_COMMON_V2_H
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#define LIBOPENCM3_USART_COMMON_V2_H
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/*****************************************************************************/
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/* Register values */
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/*****************************************************************************/
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/* --- USART_RTOR values --------------------------------------------------- */
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/* BLEN[7:0]: Block Length */
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#define USART_RTOR_BLEN_SHIFT 24
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#define USART_RTOR_BLEN_MASK (0xFF << USART_RTOR_BLEN_SHIFT)
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#define USART_RTOR_BLEN_VAL(x) ((x) << USART_RTOR_BLEN_SHIFT)
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/* RTO[23:0]: Receiver timeout value */
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#define USART_RTOR_RTO_SHIFT 0
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#define USART_RTOR_RTO_MASK (0xFFFFF << USART_RTOR_RTO_SHIFT)
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#define USART_RTOR_RTO_VAL(x) ((x) << USART_RTOR_RTO_SHIFT)
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/* --- Function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void usart_enable_data_inversion(uint32_t usart);
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void usart_disable_data_inversion(uint32_t usart);
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void usart_enable_tx_inversion(uint32_t usart);
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void usart_disable_tx_inversion(uint32_t usart);
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void usart_enable_rx_inversion(uint32_t usart);
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void usart_disable_rx_inversion(uint32_t usart);
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void usart_enable_halfduplex(uint32_t usart);
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void usart_disable_halfduplex(uint32_t usart);
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void usart_set_rx_timeout_value(uint32_t usart, uint32_t value);
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void usart_enable_rx_timeout(uint32_t usart);
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void usart_disable_rx_timeout(uint32_t usart);
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void usart_enable_rx_timeout_interrupt(uint32_t usart);
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void usart_disable_rx_timeout_interrupt(uint32_t usart);
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END_DECLS
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#endif
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/** @cond */
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#else
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#warning "usart_common_v2.h should not be included directly, only via usart.h"
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#endif
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/** @endcond */
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@ -31,6 +31,8 @@
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#ifndef LIBOPENCM3_USART_H
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#define LIBOPENCM3_USART_H
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#include <libopencm3/stm32/common/usart_common_v2.h>
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/*****************************************************************************/
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/* Module definitions */
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/*****************************************************************************/
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@ -224,17 +226,6 @@
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#define USART_GTPR_PSC (0xFF << USART_GTPR_PSC_SHIFT)
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#define USART_GTPR_PSC_VAL(x) ((x) << USART_GTPR_PSC_SHIFT)
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/* USART_RTOR Values --------------------------------------------------------*/
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#define USART_RTOR_BLEN_SHIFT 24
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#define USART_RTOR_BLEN (0xFF << USART_RTOR_BLEN_SHIFT)
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#define USART_RTOR_BLEN_VAL(x) ((x) << USART_RTOR_BLEN_SHIFT)
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#define USART_RTOR_RTO_SHIFT 0
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#define USART_RTOR_RTO (0xFF << USART_RTOR_RTO_SHIFT)
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#define USART_RTOR_RTO_VAL(x) ((x) << USART_RTOR_RTO_SHIFT)
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/* USART_RQR Values ---------------------------------------------------------*/
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#define USART_RQR_TXFRQ (1 << 4)
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@ -32,6 +32,7 @@
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#define LIBOPENCM3_USART_H
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#include <libopencm3/stm32/common/usart_common_all.h>
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#include <libopencm3/stm32/common/usart_common_v2.h>
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/* --- USART registers ----------------------------------------------------- */
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@ -342,14 +343,6 @@
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/* Note: N/A on UART4/5 */
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#define USART_GTPR_PSC_MASK 0xFF
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/* --- USART_RTOR values --------------------------------------------------- */
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/* XXX: Preguntar */
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/* BLEN[7:0]: Block Length */
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#define USART_RTOR_BLEN1_MASK (0xFF << 24)
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/* RTO[23:0]: Receiver timeout value */
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#define USART_RTOR_BLEN2_MASK (0xFFFF << 0)
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/* --- USART_RQR values --------------------------------------------------- */
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228
lib/stm32/common/usart_common_v2.c
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228
lib/stm32/common/usart_common_v2.c
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@ -0,0 +1,228 @@
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/** @addtogroup usart_file
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@author @htmlonly © @endhtmlonly 2016 Cem Basoglu <cem.basoglu@web.de>
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2016 Cem Basoglu <cem.basoglu@web.de>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#include <libopencm3/stm32/usart.h>
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/*---------------------------------------------------------------------------*/
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/** @brief USART enable data inversion
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Logical data from the data register are send/received in negative/inverse logic.
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(1=L, 0=H). The parity bit is also inverted.
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@note This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_data_inversion(uint32_t usart)
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{
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USART_CR2(usart) |= USART_CR2_DATAINV;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART disable data inversion
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Logical data from the data register are send/received in positive/direct logic.
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(1=H, 0=L)
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@note This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_data_inversion(uint32_t usart)
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{
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USART_CR2(usart) &= ~USART_CR2_DATAINV;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Enable TX pin active level inversion
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TX pin signal values are inverted. (VDD =0/mark, Gnd=1/idle).
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@note This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_tx_inversion(uint32_t usart)
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{
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USART_CR2(usart) |= USART_CR2_TXINV;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Disable TX pin active level inversion
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TX pin signal works using the standard logic levels (VDD =1/idle, Gnd=0/mark)
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@note This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_tx_inversion(uint32_t usart)
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{
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USART_CR2(usart) &= ~USART_CR2_TXINV;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Enable RX pin active level inversion
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RX pin signal values are inverted. (VDD =0/mark, Gnd=1/idle).
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@This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_rx_inversion(uint32_t usart)
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{
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USART_CR2(usart) |= USART_CR2_RXINV;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Disable RX pin active level inversion
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RX pin signal works using the standard logic levels (VDD =1/idle, Gnd=0/mark)
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@This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_rx_inversion(uint32_t usart)
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{
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USART_CR2(usart) &= ~USART_CR2_RXINV;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Enable Half-duplex
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- The TX and RX lines are internally connected.
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- The RX pin is no longer used
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- The TX pin is always released when no data is transmitted. Thus,
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it acts as a standard I/O in idle or in reception. It means
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that the I/O must be configured so that TX is configured as
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alternate function open-drain with an external pull-up.
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Apart from this, the communication protocol is similar to normal USART mode.
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Any conflicts on the line must be managed by software
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@This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_halfduplex(uint32_t usart)
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{
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USART_CR3(usart) |= USART_CR3_HDSEL;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Disable Half-duplex
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@This bit field can only be written when the USART is disabled.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_halfduplex(uint32_t usart)
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{
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USART_CR3(usart) &= ~USART_CR3_HDSEL;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART Set receiver timeout value
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Sets the receive timeout value in terms of number of bit duration.
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The RTOF @ref usart_isr_rtof is set if, after the last received character,
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no new start bit is detected for more than the receive timeout value.
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@note The timeout value can also be written when USART is enabled.
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If the new value is lower/equals the internal hardware counter,
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the RTOF flag will be set.
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@param[in] usart USART block register address base @ref usart_reg_base
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@param[in] value The receive timeout value in terms of number of bit duration.
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*/
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void usart_set_rx_timeout_value(uint32_t usart, uint32_t value)
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{
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uint32_t reg;
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reg = USART_RTOR(usart) & ~USART_RTOR_RTO_MASK;
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reg |= (USART_RTOR_RTO_VAL(value) & USART_RTOR_RTO_MASK);
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USART_RTOR(usart) = reg;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART enable receive timeout function
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@note If the USART does not support the Receiver timeout feature,
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this bit is reserved and forced by hardware to ‘0’.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_rx_timeout(uint32_t usart)
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{
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USART_CR2(usart) |= USART_CR2_RTOEN;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART disable receive timeout function
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@note If the USART does not support the Receiver timeout feature,
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this bit is reserved and forced by hardware to ‘0’.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_rx_timeout(uint32_t usart)
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{
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USART_CR2(usart) &= ~USART_CR2_RTOEN;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART enable receive timeout interrupt
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An interrupt is generated when the RTOF Flag is set
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in the ISR @ref usart_isr register.
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@note If the USART does not support the Receiver timeout feature,
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this bit is reserved and forced by hardware to ‘0’.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_enable_rx_timeout_interrupt(uint32_t usart)
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{
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USART_CR1(usart) |= USART_CR1_RTOIE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief USART disable receive timeout interrupt
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@note If the USART does not support the Receiver timeout feature,
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this bit is reserved and forced by hardware to ‘0’.
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@param[in] usart USART block register address base @ref usart_reg_base
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*/
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void usart_disable_rx_timeout_interrupt(uint32_t usart)
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{
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USART_CR1(usart) &= ~USART_CR1_RTOIE;
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}
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/**@}*/
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@ -45,6 +45,7 @@ OBJS += gpio_common_all.o gpio_common_f0234.o crc_common_all.o \
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timer_common_all.o rcc_common_all.o
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OBJS += adc_common_v2.o
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OBJS += crs_common_all.o
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OBJS += usart_common_v2.o
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OBJS += usb.o usb_control.o usb_standard.o
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OBJS += st_usbfs_core.o st_usbfs_v2.o
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@ -39,11 +39,12 @@ ARFLAGS = rcs
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OBJS = rcc.o adc.o i2c.o usart.o dma.o flash.o
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OBJS += gpio_common_all.o gpio_common_f0234.o \
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dac_common_all.o usart_common_all.o crc_common_all.o\
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dac_common_all.o crc_common_all.o \
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iwdg_common_all.o spi_common_all.o dma_common_l1f013.o\
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timer_common_all.o timer_common_f234.o flash_common_f234.o \
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flash.o exti_common_all.o rcc_common_all.o spi_common_f03.o
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OBJS += adc_common_v2.o adc_common_v2_multi.o
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OBJS += usart_common_v2.o usart_common_all.o
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OBJS += usb.o usb_control.o usb_standard.o
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OBJS += st_usbfs_core.o st_usbfs_v1.o
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