diff --git a/examples/mb525/pwmleds/pwmleds.c b/examples/mb525/pwmleds/pwmleds.c index 282ae615..23ebbe18 100644 --- a/examples/mb525/pwmleds/pwmleds.c +++ b/examples/mb525/pwmleds/pwmleds.c @@ -244,7 +244,8 @@ void clock_setup(void) rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM3EN); /* Enable GPIOC, Alternate Function clocks. */ - rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN | RCC_APB2ENR_AFIOEN); + rcc_peripheral_enable_clock(&RCC_APB2ENR, + RCC_APB2ENR_IOPCEN | RCC_APB2ENR_AFIOEN); } void gpio_setup(void) diff --git a/examples/other/dma_mem2mem/dma.c b/examples/other/dma_mem2mem/dma.c index e85e06ff..b609497f 100644 --- a/examples/other/dma_mem2mem/dma.c +++ b/examples/other/dma_mem2mem/dma.c @@ -71,20 +71,20 @@ int main(void) We want to transfer 32bit * 5 so it should fit */ char s1[20] = "Hello STM MEM2MEM\r\n"; char s2[20]; - + rcc_clock_setup_in_hse_16mhz_out_72mhz(); gpio_setup(); usart_setup(); gpio_clear(GPIOB, GPIO7); /* LED1 on */ gpio_set(GPIOB, GPIO6); /* LED2 off */ - + my_usart_print_string(USART1, "s1 "); my_usart_print_string(USART1, s1); rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_DMA1EN); - /* MEM2MEM mode for channel 1. */ + /* MEM2MEM mode for channel 1. */ dma_enable_mem2mem_mode(DMA1, DMA_CHANNEL1); /* Highest priority. */ @@ -112,7 +112,7 @@ int main(void) depending from your source device. */ dma_set_number_of_data(DMA1, DMA_CHANNEL1, 5); - /* Start DMA transfer. */ + /* Start DMA transfer. */ dma_enable_channel(DMA1, DMA_CHANNEL1); /* TODO: write a function to get the interrupt flags. */ @@ -122,7 +122,7 @@ int main(void) dma_disable_channel(DMA1, DMA_CHANNEL1); - /* String s1 should now already be transferred to s2. */ + /* String s1 should now already be transferred to s2. */ my_usart_print_string(USART1, "s2 "); my_usart_print_string(USART1, s2); diff --git a/include/libopenstm32/exti.h b/include/libopenstm32/exti.h index c2e4867c..6d0bc3aa 100644 --- a/include/libopenstm32/exti.h +++ b/include/libopenstm32/exti.h @@ -23,13 +23,14 @@ #include #include -/*Define EXTI Registers */ -#define EXTI_IMR MMIO32(EXTI_BASE + 0x00) -#define EXTI_EMR MMIO32(EXTI_BASE + 0x04) -#define EXTI_RTSR MMIO32(EXTI_BASE + 0x08) -#define EXTI_FTSR MMIO32(EXTI_BASE + 0x0C) -#define EXTI_SWIER MMIO32(EXTI_BASE + 0x10) -#define EXTI_PR MMIO32(EXTI_BASE + 0x14) +/* --- EXTI registers ------------------------------------------------------ */ + +#define EXTI_IMR MMIO32(EXTI_BASE + 0x00) +#define EXTI_EMR MMIO32(EXTI_BASE + 0x04) +#define EXTI_RTSR MMIO32(EXTI_BASE + 0x08) +#define EXTI_FTSR MMIO32(EXTI_BASE + 0x0c) +#define EXTI_SWIER MMIO32(EXTI_BASE + 0x10) +#define EXTI_PR MMIO32(EXTI_BASE + 0x14) /* EXTI number definitions */ #define EXTI0 (1 << 0) @@ -53,19 +54,17 @@ #define EXTI18 (1 << 18) #define EXTI19 (1 << 19) -/*Define trigger types*/ -typedef enum trigger_e{ -EXTI_TRIGGER_RISING, -EXTI_TRIGGER_FALLING, -EXTI_TRIGGER_BOTH, -}exti_trigger_type; +/* Trigger types */ +typedef enum trigger_e { + EXTI_TRIGGER_RISING, + EXTI_TRIGGER_FALLING, + EXTI_TRIGGER_BOTH, +} exti_trigger_type; -/*Function Prototypes */ -void exti_set_trigger(u32 extis,exti_trigger_type trig); +void exti_set_trigger(u32 extis, exti_trigger_type trig); void exti_enable_request(u32 extis); void exti_disable_request(u32 extis); void exti_reset_request(u32 extis); void exti_select_source(u32 exti, u32 gpioport); - #endif diff --git a/include/libopenstm32/iwdg.h b/include/libopenstm32/iwdg.h index a0883390..70ed6044 100644 --- a/include/libopenstm32/iwdg.h +++ b/include/libopenstm32/iwdg.h @@ -56,7 +56,7 @@ #define IWDG_PR_DIV64 0x4 #define IWDG_PR_DIV128 0x5 #define IWDG_PR_DIV256 0x6 -/* double definition */ +/* Double definition: 0x06 and 0x07 both mean DIV256 as per datasheet. */ /* #define IWDG_PR_DIV256 0x7 */ /* --- IWDG_RLR values ----------------------------------------------------- */ diff --git a/lib/exti.c b/lib/exti.c index ccef6762..df7f4cba 100644 --- a/lib/exti.c +++ b/lib/exti.c @@ -22,110 +22,119 @@ void exti_set_trigger(u32 extis, exti_trigger_type trig) { - switch(trig) - { - case EXTI_TRIGGER_RISING: - EXTI_RTSR |= extis; - EXTI_FTSR &= ~extis; - break; - case EXTI_TRIGGER_FALLING: - EXTI_RTSR &= ~extis; - EXTI_FTSR |= extis; - break; - case EXTI_TRIGGER_BOTH: - EXTI_RTSR |= extis; - EXTI_FTSR |= extis; - break; - } + switch (trig) { + case EXTI_TRIGGER_RISING: + EXTI_RTSR |= extis; + EXTI_FTSR &= ~extis; + break; + case EXTI_TRIGGER_FALLING: + EXTI_RTSR &= ~extis; + EXTI_FTSR |= extis; + break; + case EXTI_TRIGGER_BOTH: + EXTI_RTSR |= extis; + EXTI_FTSR |= extis; + break; + } } void exti_enable_request(u32 extis) { - //enable interrupts - EXTI_IMR |= extis; - //enable events - EXTI_EMR |= extis; + /* Enable interrupts. */ + EXTI_IMR |= extis; + + /* Enable events. */ + EXTI_EMR |= extis; } void exti_disable_request(u32 extis) { - //disable interrupts - EXTI_IMR &= ~extis; - //disable events - EXTI_EMR &= ~extis; -} + /* Disable interrupts. */ + EXTI_IMR &= ~extis; -/* -Reset the interrupt request by writing a 1 to the corresponding -pending bit register -*/ -void exti_reset_request(u32 extis) -{ - EXTI_PR |= extis; + /* Disable events. */ + EXTI_EMR &= ~extis; } +/* + * Reset the interrupt request by writing a 1 to the corresponding + * pending bit register. + */ +void exti_reset_request(u32 extis) +{ + EXTI_PR |= extis; +} -/*Remap an external interrupt line to the corresponding -pin on the specified GPIO port TODO: this could be rewritten in less lines of code */ +/* + * Remap an external interrupt line to the corresponding pin on the + * specified GPIO port. + * + * TODO: This could be rewritten in less lines of code. + */ void exti_select_source(u32 exti, u32 gpioport) { - u8 shift =0; - u8 bits = 0; - switch (exti) - { - case EXTI0: - case EXTI4: - case EXTI8: - case EXTI12: - shift = 0; - break; - case EXTI1: - case EXTI5: - case EXTI9: - case EXTI13: - shift = 4; - break; - case EXTI2: - case EXTI6: - case EXTI10: - case EXTI14: - shift = 8; - break; - case EXTI3: - case EXTI7: - case EXTI11: - case EXTI15: - shift = 12; - break; - } - - switch (gpioport) - { - case GPIOA: - bits = 0xF; - break; - case GPIOB: - bits = 0xE; - break; - case GPIOC: - bits = 0xD; - break; - case GPIOD: - bits = 0xC; - break; - case GPIOE: - bits = 0xB; - break; - case GPIOF: - bits = 0xA; - break; - case GPIOG: - bits = 0x9; - break; - } - - if(exti < EXTI4) AFIO_EXTICR1 &=~ ( bits << shift ); - else if (exti < EXTI8) AFIO_EXTICR2 &=~ ( bits << shift ); - else if (exti < EXTI12) AFIO_EXTICR3 &=~ ( bits << shift ); - else if (exti < EXTI16) AFIO_EXTICR4 &=~ ( bits << shift ); //ensure that only valid EXTI lines are used -} \ No newline at end of file + u8 shift, bits; + + shift = bits = 0; + + switch (exti) { + case EXTI0: + case EXTI4: + case EXTI8: + case EXTI12: + shift = 0; + break; + case EXTI1: + case EXTI5: + case EXTI9: + case EXTI13: + shift = 4; + break; + case EXTI2: + case EXTI6: + case EXTI10: + case EXTI14: + shift = 8; + break; + case EXTI3: + case EXTI7: + case EXTI11: + case EXTI15: + shift = 12; + break; + } + + switch (gpioport) { + case GPIOA: + bits = 0xf; + break; + case GPIOB: + bits = 0xe; + break; + case GPIOC: + bits = 0xd; + break; + case GPIOD: + bits = 0xc; + break; + case GPIOE: + bits = 0xb; + break; + case GPIOF: + bits = 0xa; + break; + case GPIOG: + bits = 0x9; + break; + } + + /* Ensure that only valid EXTI lines are used. */ + if (exti < EXTI4) + AFIO_EXTICR1 &= ~(bits << shift); + else if (exti < EXTI8) + AFIO_EXTICR2 &= ~(bits << shift); + else if (exti < EXTI12) + AFIO_EXTICR3 &= ~(bits << shift); + else if (exti < EXTI16) + AFIO_EXTICR4 &= ~(bits << shift); +}