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Fixed non-control endpoints for connectivity line USB.

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This commit is contained in:
Gareth McMullin 2011-03-15 20:33:02 +13:00
parent 67e3452855
commit 6bbc4c2f7c
2 changed files with 43 additions and 28 deletions
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2
include/libopencm3/stm32/otg_fs.h
View File

@ -250,6 +250,7 @@
#define OTG_FS_DIEPCTL0_EPENA (1 << 31) #define OTG_FS_DIEPCTL0_EPENA (1 << 31)
#define OTG_FS_DIEPCTL0_EPDIS (1 << 30) #define OTG_FS_DIEPCTL0_EPDIS (1 << 30)
/* Bits 29:28 - Reserved */ /* Bits 29:28 - Reserved */
#define OTG_FS_DIEPCTLX_SD0PID (1 << 28)
#define OTG_FS_DIEPCTL0_SNAK (1 << 27) #define OTG_FS_DIEPCTL0_SNAK (1 << 27)
#define OTG_FS_DIEPCTL0_CNAK (1 << 26) #define OTG_FS_DIEPCTL0_CNAK (1 << 26)
#define OTG_FS_DIEPCTL0_TXFNUM_MASK (0xf << 22) #define OTG_FS_DIEPCTL0_TXFNUM_MASK (0xf << 22)
@ -270,6 +271,7 @@
#define OTG_FS_DOEPCTL0_EPENA (1 << 31) #define OTG_FS_DOEPCTL0_EPENA (1 << 31)
#define OTG_FS_DOEPCTL0_EPDIS (1 << 30) #define OTG_FS_DOEPCTL0_EPDIS (1 << 30)
/* Bits 29:28 - Reserved */ /* Bits 29:28 - Reserved */
#define OTG_FS_DOEPCTLX_SD0PID (1 << 28)
#define OTG_FS_DOEPCTL0_SNAK (1 << 27) #define OTG_FS_DOEPCTL0_SNAK (1 << 27)
#define OTG_FS_DOEPCTL0_CNAK (1 << 26) #define OTG_FS_DOEPCTL0_CNAK (1 << 26)
/* Bits 25:22 - Reserved */ /* Bits 25:22 - Reserved */

69
lib/usb/usb_f107.c
View File

@ -25,6 +25,10 @@
#include <string.h> #include <string.h>
/* Receive FIFO size in 32-bit words */
#define RX_FIFO_SIZE 128
static uint16_t fifo_mem_top;
static void stm32f107_usbd_init(void); static void stm32f107_usbd_init(void);
static void stm32f107_set_address(u8 addr); static void stm32f107_set_address(u8 addr);
static void stm32f107_ep_setup(u8 addr, u8 type, u16 max_size, static void stm32f107_ep_setup(u8 addr, u8 type, u16 max_size,
@ -55,7 +59,6 @@ const struct _usbd_driver stm32f107_usb_driver = {
/** Initialize the USB device controller hardware of the STM32. */ /** Initialize the USB device controller hardware of the STM32. */
static void stm32f107_usbd_init(void) static void stm32f107_usbd_init(void)
{ {
int i;
/* TODO: Enable interrupts on Reset, Transfer, Suspend and Resume */ /* TODO: Enable interrupts on Reset, Transfer, Suspend and Resume */
OTG_FS_GINTSTS = OTG_FS_GINTSTS_MMIS; OTG_FS_GINTSTS = OTG_FS_GINTSTS_MMIS;
@ -82,9 +85,8 @@ static void stm32f107_usbd_init(void)
/* Restart the phy clock */ /* Restart the phy clock */
OTG_FS_PCGCCTL = 0; OTG_FS_PCGCCTL = 0;
OTG_FS_GRXFSIZ = 128; OTG_FS_GRXFSIZ = RX_FIFO_SIZE;
OTG_FS_GNPTXFSIZ = (128 << 16) | 128; fifo_mem_top = RX_FIFO_SIZE;
/* Unmask interrupts for TX and RX */ /* Unmask interrupts for TX and RX */
OTG_FS_GINTMSK &= OTG_FS_GINTMSK_RXFLVLM; OTG_FS_GINTMSK &= OTG_FS_GINTMSK_RXFLVLM;
@ -125,14 +127,21 @@ static void stm32f107_ep_setup(u8 addr, u8 type, u16 max_size,
OTG_FS_DOEPTSIZ(0) = doeptsiz[0]; OTG_FS_DOEPTSIZ(0) = doeptsiz[0];
OTG_FS_DOEPCTL(0) |= OTG_FS_DOEPCTL0_EPENA | OTG_FS_DIEPCTL0_SNAK; OTG_FS_DOEPCTL(0) |= OTG_FS_DOEPCTL0_EPENA | OTG_FS_DIEPCTL0_SNAK;
OTG_FS_GNPTXFSIZ = ((max_size / 4) << 16) | RX_FIFO_SIZE;
fifo_mem_top += max_size / 4;
return; return;
} }
/* TODO: Configuration for other endpoints */ /* TODO: Configuration for other endpoints */
if (dir) { if (dir) {
OTG_FS_DIEPTXF(addr) = ((max_size / 4) << 16) | fifo_mem_top;
fifo_mem_top += max_size / 4;
OTG_FS_DIEPTSIZ(addr) = (max_size & OTG_FS_DIEPSIZ0_XFRSIZ_MASK); OTG_FS_DIEPTSIZ(addr) = (max_size & OTG_FS_DIEPSIZ0_XFRSIZ_MASK);
OTG_FS_DIEPCTL(addr) |= OTG_FS_DIEPCTL0_EPENA | OTG_FS_DIEPCTL(addr) |= OTG_FS_DIEPCTL0_EPENA |
OTG_FS_DIEPCTL0_SNAK | (type << 18) | OTG_FS_DIEPCTL0_SNAK | (type << 18) |
OTG_FS_DIEPCTL0_USBAEP |
(addr << 22) | max_size; (addr << 22) | max_size;
if (callback) { if (callback) {
@ -147,7 +156,8 @@ static void stm32f107_ep_setup(u8 addr, u8 type, u16 max_size,
(max_size & OTG_FS_DIEPSIZ0_XFRSIZ_MASK); (max_size & OTG_FS_DIEPSIZ0_XFRSIZ_MASK);
OTG_FS_DOEPTSIZ(addr) = doeptsiz[addr]; OTG_FS_DOEPTSIZ(addr) = doeptsiz[addr];
OTG_FS_DOEPCTL(addr) |= OTG_FS_DOEPCTL0_EPENA | OTG_FS_DOEPCTL(addr) |= OTG_FS_DOEPCTL0_EPENA |
OTG_FS_DIEPCTL0_CNAK | (type << 18) | max_size; OTG_FS_DOEPCTL0_USBAEP | OTG_FS_DIEPCTL0_CNAK |
(type << 18) | max_size;
if (callback) { if (callback) {
_usbd_device. _usbd_device.
@ -159,7 +169,8 @@ static void stm32f107_ep_setup(u8 addr, u8 type, u16 max_size,
static void stm32f107_endpoints_reset(void) static void stm32f107_endpoints_reset(void)
{ {
/* TODO: Reset all endpoints. */ /* The core resets the endpoints automatically on reset */
fifo_mem_top = RX_FIFO_SIZE;
} }
static void stm32f107_ep_stall_set(u8 addr, u8 stall) static void stm32f107_ep_stall_set(u8 addr, u8 stall)
@ -174,26 +185,29 @@ static void stm32f107_ep_stall_set(u8 addr, u8 stall)
if(addr & 0x80) { if(addr & 0x80) {
addr &= 0x7F; addr &= 0x7F;
if(stall) if(stall) {
OTG_FS_DIEPCTL(addr) |= OTG_FS_DIEPCTL0_STALL; OTG_FS_DIEPCTL(addr) |= OTG_FS_DIEPCTL0_STALL;
else } else {
OTG_FS_DIEPCTL(addr) &= ~OTG_FS_DIEPCTL0_STALL; OTG_FS_DIEPCTL(addr) &= ~OTG_FS_DIEPCTL0_STALL;
/* TODO: Reset to DATA0 */ OTG_FS_DIEPCTL(addr) |= OTG_FS_DIEPCTLX_SD0PID;
}
} else { } else {
if(stall) if(stall) {
OTG_FS_DOEPCTL(addr) |= OTG_FS_DOEPCTL0_STALL; OTG_FS_DOEPCTL(addr) |= OTG_FS_DOEPCTL0_STALL;
else } else {
OTG_FS_DOEPCTL(addr) &= ~OTG_FS_DOEPCTL0_STALL; OTG_FS_DOEPCTL(addr) &= ~OTG_FS_DOEPCTL0_STALL;
/* TODO: Reset to DATA0 */ OTG_FS_DOEPCTL(addr) |= OTG_FS_DOEPCTLX_SD0PID;
}
} }
} }
static u8 stm32f107_ep_stall_get(u8 addr) static u8 stm32f107_ep_stall_get(u8 addr)
{ {
/* TODO: return 1 if STALL set. */ /* return non-zero if STALL set. */
(void)addr; if(addr & 0x80)
return (OTG_FS_DIEPCTL(addr&0x7f) & OTG_FS_DIEPCTL0_STALL)?1:0;
return 0; else
return (OTG_FS_DOEPCTL(addr) & OTG_FS_DOEPCTL0_STALL)?1:0;
} }
static u16 stm32f107_ep_write_packet(u8 addr, const void *buf, u16 len) static u16 stm32f107_ep_write_packet(u8 addr, const void *buf, u16 len)
@ -249,11 +263,12 @@ static u16 stm32f107_ep_read_packet(u8 addr, void *buf, u16 len)
static void stm32f107_poll(void) static void stm32f107_poll(void)
{ {
/* TODO: Read interrupt status register */ /* Read interrupt status register */
u32 intsts = OTG_FS_GINTSTS; u32 intsts = OTG_FS_GINTSTS;
int i;
if (intsts & OTG_FS_GINTSTS_ENUMDNE) { if (intsts & OTG_FS_GINTSTS_ENUMDNE) {
/* TODO: Handle USB RESET condition */ /* Handle USB RESET condition */
OTG_FS_GINTSTS = OTG_FS_GINTSTS_ENUMDNE; OTG_FS_GINTSTS = OTG_FS_GINTSTS_ENUMDNE;
_usbd_reset(); _usbd_reset();
return; return;
@ -266,7 +281,8 @@ static void stm32f107_poll(void)
u32 rxstsp = OTG_FS_GRXSTSP; u32 rxstsp = OTG_FS_GRXSTSP;
u32 pktsts = rxstsp & OTG_FS_GRXSTSP_PKTSTS_MASK; u32 pktsts = rxstsp & OTG_FS_GRXSTSP_PKTSTS_MASK;
if((pktsts != OTG_FS_GRXSTSP_PKTSTS_OUT) && if((pktsts != OTG_FS_GRXSTSP_PKTSTS_OUT) &&
(pktsts != OTG_FS_GRXSTSP_PKTSTS_SETUP)) return; (pktsts != OTG_FS_GRXSTSP_PKTSTS_SETUP))
return;
u8 ep = rxstsp & OTG_FS_GRXSTSP_EPNUM_MASK; u8 ep = rxstsp & OTG_FS_GRXSTSP_EPNUM_MASK;
u8 type; u8 type;
@ -287,15 +303,12 @@ static void stm32f107_poll(void)
* the XFRC bit must be checked in each OTG_FS_DIEPINT(x) * the XFRC bit must be checked in each OTG_FS_DIEPINT(x)
*/ */
/* TODO: Check on endpoint interrupt... */ /* TODO: Check on endpoint interrupt... */
{ for (i = 0; i < 4; i++) { /* Iterate over endpoints */
int i; if(OTG_FS_DIEPINT(i) & OTG_FS_DIEPINTX_XFRC) {
for (i = 0; i < 4; i++) { /* Iterate over endpoints */ /* Transfer complete */
if(OTG_FS_DIEPINT(i) & OTG_FS_DIEPINTX_XFRC) { if (_usbd_device.user_callback_ctr[i][USB_TRANSACTION_IN])
/* Transfer complete */ _usbd_device.user_callback_ctr[i][USB_TRANSACTION_IN] (i);
if (_usbd_device.user_callback_ctr[i][USB_TRANSACTION_IN]) OTG_FS_DIEPINT(i) = OTG_FS_DIEPINTX_XFRC;
_usbd_device.user_callback_ctr[i][USB_TRANSACTION_IN] (i);
OTG_FS_DIEPINT(i) = OTG_FS_DIEPINTX_XFRC;
}
} }
} }