stm32f3: rcc: fix typo in PLL clocks for APB1
Reported by jabjoe on irc, fixed by zyp
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@ -80,7 +80,7 @@ const struct rcc_clock_scale rcc_hse8mhz_configs[] = {
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.ppre1 = RCC_CFGR_PPRE1_DIV_2,
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.ppre2 = RCC_CFGR_PPRE2_DIV_NONE,
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.ahb_frequency = 72e6,
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.apb1_frequency = 32e6,
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.apb1_frequency = 36e6,
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.apb2_frequency = 72e6,
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}
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};
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