jackcartersmith/blackmagic
1
0
Fork 0
Code Issues Pull Requests Releases Activity

doc: stm32: fix doxygen syntax

Browse Source 
Missing endgroups, some accidental syntax errors/unknown commands.
This commit is contained in:
Karl Palsson 2016-08-18 16:57:10 +00:00 committed by Karl Palsson
parent 34c3a64177
commit 75011168f7
4 changed files with 9 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
include/libopencm3/stm32/l1/gpio.h
View File

@ -163,10 +163,10 @@ LGPL License Terms @ref lgpl_license
/* Output type (OTx values) */ /* Output type (OTx values) */
/** @defgroup gpio_output_type GPIO Output Pin Driver Type /** @defgroup gpio_output_type GPIO Output Pin Driver Type
@ingroup gpio_defines @ingroup gpio_defines
@list Push Pull
@list Open Drain
@{*/ @{*/
/** Push-Pull */
#define GPIO_OTYPE_PP 0x0 #define GPIO_OTYPE_PP 0x0
/** Open Drain */
#define GPIO_OTYPE_OD 0x1 #define GPIO_OTYPE_OD 0x1
/**@}*/ /**@}*/

1
lib/stm32/common/adc_common_v2.c
View File

@ -354,3 +354,4 @@ void adc_start_conversion_regular(uint32_t adc)
while (ADC_CR(adc) & ADC_CR_ADSTART); while (ADC_CR(adc) & ADC_CR_ADSTART);
} }
/**@}*/

2
lib/stm32/common/adc_common_v2_multi.c
View File

@ -127,3 +127,5 @@ void adc_set_regular_sequence(uint32_t adc, uint8_t length, uint8_t channel[])
ADC_SQR3(adc) = reg32_3; ADC_SQR3(adc) = reg32_3;
ADC_SQR4(adc) = reg32_4; ADC_SQR4(adc) = reg32_4;
} }
/**@}*/

8
lib/stm32/common/usart_common_v2.c
View File

@ -90,7 +90,7 @@ void usart_disable_tx_inversion(uint32_t usart)
RX pin signal values are inverted. (VDD =0/mark, Gnd=1/idle). RX pin signal values are inverted. (VDD =0/mark, Gnd=1/idle).
@This bit field can only be written when the USART is disabled. This bit field can only be written when the USART is disabled.
@param[in] usart USART block register address base @ref usart_reg_base @param[in] usart USART block register address base @ref usart_reg_base
*/ */
@ -104,7 +104,7 @@ void usart_enable_rx_inversion(uint32_t usart)
RX pin signal works using the standard logic levels (VDD =1/idle, Gnd=0/mark) RX pin signal works using the standard logic levels (VDD =1/idle, Gnd=0/mark)
@This bit field can only be written when the USART is disabled. This bit field can only be written when the USART is disabled.
@param[in] usart USART block register address base @ref usart_reg_base @param[in] usart USART block register address base @ref usart_reg_base
*/ */
@ -127,7 +127,7 @@ void usart_disable_rx_inversion(uint32_t usart)
Apart from this, the communication protocol is similar to normal USART mode. Apart from this, the communication protocol is similar to normal USART mode.
Any conflicts on the line must be managed by software Any conflicts on the line must be managed by software
@This bit field can only be written when the USART is disabled. This bit field can only be written when the USART is disabled.
@param[in] usart USART block register address base @ref usart_reg_base @param[in] usart USART block register address base @ref usart_reg_base
*/ */
@ -139,7 +139,7 @@ void usart_enable_halfduplex(uint32_t usart)
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
/** @brief USART Disable Half-duplex /** @brief USART Disable Half-duplex
@This bit field can only be written when the USART is disabled. This bit field can only be written when the USART is disabled.
@param[in] usart USART block register address base @ref usart_reg_base @param[in] usart USART block register address base @ref usart_reg_base
*/ */